公开(公告)号：US10281521B2

公开(公告)日：2019-05-07

申请号：US15367415

申请日：2016-12-02

Applicant: Intel Corporation

Inventor： David Won-jun Song ,  James R. Hastings ,  Akhilesh P. Rallabandi ,  Morten S. Jensen ,  Christopher Wade Ackerman ,  Christopher R. Schroeder ,  Nader N. Abazarnia ,  John C. Johnson

IPC: G01R31/10 ,  G01R31/28 ,  H05B6/10

Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.

公开(公告)号：US20180156863A1

公开(公告)日：2018-06-07

申请号：US15367415

申请日：2016-12-02

Applicant: Intel Corporation

Inventor： David Won-jun Song ,  James R. Hastings ,  Akhilesh P. Rallabandi ,  Morten S. Jensen ,  Christopher Wade Ackerman ,  Christopher R. Schroeder ,  Nader N. Abazarnia ,  John C. Johnson

IPC: G01R31/28 ,  H05B6/10

CPC classification number: G01R31/2875 ,  H05B6/06 ,  H05B6/10 ,  H05B6/105

Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.