公开(公告)号：US20210059073A1

公开(公告)日：2021-02-25

申请号：US17090624

申请日：2020-11-05

Applicant: Intel Corporation

Inventor： Gaurav Patankar ,  Ruander Cardenas ,  Mark MacDonald ,  Akhilesh P. Rallabandi

IPC: H05K7/20

Abstract: Heterogeneous heat pipe solutions provide both low thermal resistance and a high Qmax. Some heterogeneous heat pipe solutions comprise multiple homogenous heat pipes operating in parallel, with each homogeneous heat pipe having its thermal performance tailored to handle a processor operating in a particular power mode. Other heterogeneous heat pipe solutions comprise one or more heterogeneous heat pipes, each heterogeneous heat pipe having more than wick, each wick having a different set of wick characteristics (wick material, wick thickness, etc.). Heterogeneous heat pipes can provide a thermal management solution for processors over their full operating power range.

公开(公告)号：US11251103B2

公开(公告)日：2022-02-15

申请号：US16370621

申请日：2019-03-29

Applicant: INTEL CORPORATION

Inventor： Jerrod Peterson ,  Carin Lundquist Ruiz ,  Akhilesh P. Rallabandi

IPC: H01L23/367 ,  H01L23/40 ,  H01L23/36 ,  H01L23/427 ,  H05K7/20

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to enable a segmented heatsink. The electronic device can include a printed circuit board, a substrate, where the substrate is over the printed circuit board, at least two heat sources over the substrate, and a segmented heatsink secured to the printed circuit board, where the segmented heatsink has at least two independent heatsink segments, where each heatsink segment corresponds to at least one heat source and is configured to draw heat from the corresponding heat source. In an example, the heat sources are at a different height.

公开(公告)号：US20180156863A1

公开(公告)日：2018-06-07

申请号：US15367415

申请日：2016-12-02

Applicant: Intel Corporation

Inventor： David Won-jun Song ,  James R. Hastings ,  Akhilesh P. Rallabandi ,  Morten S. Jensen ,  Christopher Wade Ackerman ,  Christopher R. Schroeder ,  Nader N. Abazarnia ,  John C. Johnson

IPC: G01R31/28 ,  H05B6/10

CPC classification number: G01R31/2875 ,  H05B6/06 ,  H05B6/10 ,  H05B6/105

Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.

公开(公告)号：US20190252286A1

公开(公告)日：2019-08-15

申请号：US16370621

申请日：2019-03-29

Applicant: INTEL CORPORATION

Inventor： Jerrod Peterson ,  Carin Lundquist Ruiz ,  Akhilesh P. Rallabandi

IPC: H01L23/367 ,  H01L23/40

CPC classification number: H01L23/367 ,  H01L23/4006

Abstract: Particular embodiments described herein provide for an electronic device that can be configured to enable a segmented heatsink. The electronic device can include a printed circuit board, a substrate, where the substrate is over the printed circuit board, at least two heat sources over the substrate, and a segmented heatsink secured to the printed circuit board, where the segmented heatsink has at least two independent heatsink segments, where each heatsink segment corresponds to at least one heat source and is configured to draw heat from the corresponding heat source. In an example, the heat sources are at a different height.

公开(公告)号：US10281521B2

公开(公告)日：2019-05-07

申请号：US15367415

申请日：2016-12-02

Applicant: Intel Corporation

Inventor： David Won-jun Song ,  James R. Hastings ,  Akhilesh P. Rallabandi ,  Morten S. Jensen ,  Christopher Wade Ackerman ,  Christopher R. Schroeder ,  Nader N. Abazarnia ,  John C. Johnson

IPC: G01R31/10 ,  G01R31/28 ,  H05B6/10

Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.