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公开(公告)号:US11032941B2
公开(公告)日:2021-06-08
申请号:US16368341
申请日:2019-03-28
Applicant: Intel Corporation
Inventor: Minh Le , Thomas Boyd , Bijoyraj Sahu , Evan Chenelly , Christopher Wade Ackerman , Carlos Alvizo Flores , Craig Jahne
IPC: H05K7/20
Abstract: Systems, apparatuses, methods, and computer-readable media are presented for managing an apparatus for thermal energy management including a first container. The first container includes a first cavity, and is configured to hold a first liquid coolant within the first cavity to at least partially surround a second container. The second container includes a second cavity configured to hold one or more heat sources, and a second liquid coolant to at least partially surround the one or more heat sources. The second container is sealed to separate the first liquid coolant from the second liquid coolant. Other embodiments may be described and/or claimed.
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公开(公告)号:US20180156863A1
公开(公告)日:2018-06-07
申请号:US15367415
申请日:2016-12-02
Applicant: Intel Corporation
Inventor: David Won-jun Song , James R. Hastings , Akhilesh P. Rallabandi , Morten S. Jensen , Christopher Wade Ackerman , Christopher R. Schroeder , Nader N. Abazarnia , John C. Johnson
CPC classification number: G01R31/2875 , H05B6/06 , H05B6/10 , H05B6/105
Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.
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公开(公告)号:US11808813B2
公开(公告)日:2023-11-07
申请号:US17692248
申请日:2022-03-11
Applicant: Intel Corporation
Inventor: Mahesh Deshmane , Shoujie He , Christopher Wade Ackerman , Jacob Hales , Johnny Mata Vega , Joseph Zearing
IPC: G01R31/319 , G01R31/28 , G01R31/317
CPC classification number: G01R31/31905 , G01R31/2874 , G01R31/31721 , G01R31/31917
Abstract: An apparatus includes a processor configured to control an automatic test equipment (ATE) to measure one or more parameters of a current test instance for testing a device under test (DUT), during execution of the current test instance on the DUT, and determine, based on the measured one or more parameters, one or more controls for controlling a temperature of a thermal head connected to the DUT so that a junction temperature of the DUT corresponds to a predetermined test temperature. The processor is further configured to control the temperature of the thermal head, based on the determined one or more controls.
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公开(公告)号:US12000487B2
公开(公告)日:2024-06-04
申请号:US17895104
申请日:2022-08-25
Applicant: Intel Corporation
Inventor: Paul Diglio , Craig Yost , Christopher Wade Ackerman
IPC: F16J15/328
CPC classification number: F16J15/328
Abstract: The present disclosure is directed to a system having a first loading component and a second loading component for applying load to a device during a test of the device, the first loading component is configured to be moveable with respect to the second loading component. The system includes a seal member arranged between the first loading component and the second loading component, the seal member is adapted to engage the device during testing so as to apply a load against the device during testing and provide sealing around a cavity positioned below the first loading component and above the device.
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公开(公告)号:US11464139B2
公开(公告)日:2022-10-04
申请号:US16180499
申请日:2018-11-05
Applicant: Intel Corporation
Inventor: Kelly Lofgreen , Joseph Petrini , Todd Coons , Christopher Wade Ackerman , Edvin Cetegen , Yang Jiao , Michael Rutigliano , Kuang Liu
IPC: H05K7/20
Abstract: A conformable heat sink interface for an integrated circuit package comprises a mounting plate having a first surface and a deformable membrane having a portion bonded to a second surface of the plate. A cavity is between the second surface of the plate and the deformable membrane. A flowable heat transfer medium is within the cavity. The flowable heat transfer medium has a thermal conductivity of not less than 30 W/m K. The deformable membrane is to conform to a three-dimensional shape of an IC package and the mounting plate has a second surface that is to be adjacent to a heat sink base.
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公开(公告)号:US20190223324A1
公开(公告)日:2019-07-18
申请号:US16368341
申请日:2019-03-28
Applicant: Intel Corporation
Inventor: Minh Le , Thomas Boyd , Bijoyraj Sahu , Evan Chenelly , Christopher Wade Ackerman , Carlos Alvizo Flores , Craig Jahne
IPC: H05K7/20
CPC classification number: H05K7/20281 , H05K7/20236 , H05K7/20272 , H05K7/20409 , H05K7/20509 , H05K7/20781 , H05K7/20836
Abstract: Systems, apparatuses, methods, and computer-readable media are presented for managing an apparatus for thermal energy management including a first container. The first container includes a first cavity, and is configured to hold a first liquid coolant within the first cavity to at least partially surround a second container. The second container includes a second cavity configured to hold one or more heat sources, and a second liquid coolant to at least partially surround the one or more heat sources. The second container is sealed to separate the first liquid coolant from the second liquid coolant. Other embodiments may be described and/or claimed.
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公开(公告)号:US10281521B2
公开(公告)日:2019-05-07
申请号:US15367415
申请日:2016-12-02
Applicant: Intel Corporation
Inventor: David Won-jun Song , James R. Hastings , Akhilesh P. Rallabandi , Morten S. Jensen , Christopher Wade Ackerman , Christopher R. Schroeder , Nader N. Abazarnia , John C. Johnson
Abstract: Techniques for thermal management of a device under test are discussed. In an example, an apparatus may include a pedestal having a device-specific surface configured to exchange heat with the integrated circuit while the device-specific surface is in contact with a surface of the integrated circuit or separated from the surface of the integrated circuit by a layer of thermally conductive material, and a heat generating element configured to heat the device-specific surface. In certain examples, the pedestal may include a plurality of channels configured to couple to a manifold and to route thermal material from the manifold through an interior of the pedestal for maintaining temperature control of the surface of an integrated circuit under test.
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