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公开(公告)号:US11527501B1
公开(公告)日:2022-12-13
申请号:US17122934
申请日:2020-12-15
Applicant: Intel Corporation
Inventor: Adel A. Elsherbini , Veronica Aleman Strong , Shawna M. Liff , Brandon M. Rawlings , Jagat Shakya , Johanna M. Swan , David M. Craig , Jeremy Alan Streifer , Brennen Karl Mueller
Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region and coupled to the first microelectronic component by the first and second direct bonding regions, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, and wherein individual first metal contacts in the first direct bonding region are coupled to respective individual second metal contacts in the second direct bonding region; and a void between an individual first metal contact and a respective individual second metal contact.
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公开(公告)号:US11749628B2
公开(公告)日:2023-09-05
申请号:US18053869
申请日:2022-11-09
Applicant: Intel Corporation
Inventor: Adel A. Elsherbini , Veronica Aleman Strong , Shawna M. Lift , Brandon M. Rawlings , Jagat Shakya , Johanna M. Swan , David M. Craig , Jeremy Alan Streifer , Brennen Karl Mueller
CPC classification number: H01L24/06 , B81B7/0006 , B81B7/007
Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the first microelectronic component is coupled to the second microelectronic component by interconnects, and wherein the interconnects include individual first metal contacts coupled to respective individual second metal contacts; and a void between an individual first metal contact that is not coupled to a respective individual second metal contact, wherein the void is in the first direct bonding region.
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公开(公告)号:US20230074970A1
公开(公告)日:2023-03-09
申请号:US18053869
申请日:2022-11-09
Applicant: Intel Corporation
Inventor: Adel A. Elsherbini , Veronica Aleman Strong , Shawna M. Liff , Brandon M. Rawlings , Jagat Shakya , Johanna M. Swan , David M. Craig , Jeremy Alan Streifer , Brennen Karl Mueller
Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the first microelectronic component is coupled to the second microelectronic component by interconnects, and wherein the interconnects include individual first metal contacts coupled to respective individual second metal contacts; and a void between an individual first metal contact that is not coupled to a respective individual second metal contact, wherein the void is in the first direct bonding region.
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公开(公告)号:US11486923B2
公开(公告)日:2022-11-01
申请号:US16210259
申请日:2018-12-05
Applicant: Intel Corporation
Inventor: Jagat Shakya , Ethan Caughey , Jeremy Alan Streifer
Abstract: Disclosed herein are apparatuses and methods for mitigating sticking of units-under-test (UUTs). For example, in some embodiments, a probe card may include a probe landing pad, a guide plate having a hole therein, and a pushing mechanism. The pushing mechanism may include a pusher needle and a pusher needle support, the pusher needle support may be between the probe landing pad and the guide plate, and the pusher needle support may be controllable to cause the pusher needle to extend and retract through the hole in the guide plate.
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公开(公告)号:US20200182928A1
公开(公告)日:2020-06-11
申请号:US16210259
申请日:2018-12-05
Applicant: Intel Corporation
Inventor: Jagat Shakya , Ethan Caughey , Jeremy Alan Streifer
Abstract: Disclosed herein are apparatuses and methods for mitigating sticking of units-under-test (UUTs). For example, in some embodiments, a probe card may include a probe landing pad, a guide plate having a hole therein, and a pushing mechanism. The pushing mechanism may include a pusher needle and a pusher needle support, the pusher needle support may be between the probe landing pad and the guide plate, and the pusher needle support may be controllable to cause the pusher needle to extend and retract through the hole in the guide plate.
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