公开(公告)号：US20160093540A1

公开(公告)日：2016-03-31

申请号：US14499120

申请日：2014-09-27

Applicant: INTEL CORPORATION

Inventor： Shuhong LIU ,  Nilanjan Z. GHOSH ,  Zhiyong WANG ,  Deepak GOYAL ,  Shripad GOKHALE ,  Jieping ZHANG

IPC: H01L21/66 ,  H01L21/56 ,  H01L21/78 ,  G01B11/06

CPC classification number: H01L22/12 ,  G01B11/06 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/97 ,  H01L2224/16227 ,  H01L2224/97 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/37001 ,  H01L2224/81

Abstract: A method including emitting a terahertz beam from a light source at a layer of molding material; detecting a reflectance of the beam; and determining a thickness of the layer of molding material. A system including a panel supporter operable to support a panel including a plurality of substrates arranged in a planar array; a light source operable to emit a terahertz beam at a panel on the panel supporter; a detector operable to detect a reflection of a terahertz beam emitted at a panel; and a processor operable to determine a thickness of a material on the panel based on a time delay for an emitted terahertz beam to be detected by the detector.

Abstract translation: 一种包括在成型材料层从光源发射太赫兹光束的方法; 检测光束的反射率; 并确定成型材料层的厚度。 一种包括面板支撑件的系统，其可操作以支撑包括布置在平面阵列中的多个基板的面板; 光源，其可操作以在所述面板支撑件上的面板处发射太赫兹光束; 检测器，用于检测在面板上发射的太赫兹波束的反射; 以及处理器，其可操作以基于由检测器检测的发射的太赫兹光束的时间延迟来确定面板上的材料的厚度。

公开(公告)号：US20210082798A1

公开(公告)日：2021-03-18

申请号：US16575307

申请日：2019-09-18

Applicant: Intel Corporation

Inventor： Xiao LU ,  Jiongxin LU ,  Christopher COMBS ,  Alexander HUETTIS ,  John HARPER ,  Jieping ZHANG ,  Nachiket R. RARAVIKAR ,  Pramod MALATKAR ,  Steven A. KLEIN ,  Carl DEPPISCH ,  Mohit SOOD

IPC: H01L23/498 ,  B23K3/06 ,  H01L23/538

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.

公开(公告)号：US20240162134A1

公开(公告)日：2024-05-16

申请号：US18418154

申请日：2024-01-19

Applicant: Intel Corporation

Inventor： Xiao LU ,  Jiongxin LU ,  Christopher COMBS ,  Alexander HUETTIS ,  John HARPER ,  Jieping ZHANG ,  Nachiket R. RARAVIKAR ,  Pramod MALATKAR ,  Steven A. KLEIN ,  Carl DEPPISCH ,  Mohit SOOD

IPC: H01L23/498 ,  B23K3/06 ,  H01L23/538

CPC classification number: H01L23/49833 ,  B23K3/0623 ,  H01L23/49822 ,  H01L23/4985 ,  H01L23/5387

Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a first substrate; a second substrate; and an array of interconnects electrically coupling the first substrate to the second substrate. In an embodiment, the array of interconnects comprises first interconnects, wherein the first interconnects have a first volume and a first material composition, and second interconnects, wherein the second interconnects have a second volume and a second material composition, and wherein the first volume is different than the second volume and/or the first material composition is different than the second material composition.