公开(公告)号：US20180366421A1

公开(公告)日：2018-12-20

申请号：US15847193

申请日：2017-12-19

Applicant: Intel Corporation

Inventor： Eric Li ,  Joshua Heppner ,  Rajendra Dias ,  Mitul Modi

IPC: H01L23/60 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56 ,  H01L23/552 ,  H01L23/00

CPC classification number: H01L23/60 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/15159 ,  H01L2924/1815

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

公开(公告)号：US09847304B2

公开(公告)日：2017-12-19

申请号：US14998292

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Eric Li ,  Joshua Heppner ,  Rajendra Dias ,  Mitul Modi

IPC: H01L23/60 ,  H01L23/31 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/60 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/15159 ,  H01L2924/1815

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

公开(公告)号：US20170186708A1

公开(公告)日：2017-06-29

申请号：US14998292

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Eric Li ,  Joshua Heppner ,  Rajendra Dias ,  Mitul Modi

IPC: H01L23/60 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC classification number: H01L23/60 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/3185 ,  H01L23/552 ,  H01L24/97 ,  H01L2924/15159 ,  H01L2924/1815

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

公开(公告)号：US10325866B2

公开(公告)日：2019-06-18

申请号：US15847193

申请日：2017-12-19

Applicant: Intel Corporation

Inventor： Eric Li ,  Joshua Heppner ,  Rajendra Dias ,  Mitul Modi

IPC: H01L23/60 ,  H01L21/78 ,  H01L23/31 ,  H01L21/56 ,  H01L23/552 ,  H01L23/00

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

公开(公告)号：US10193493B2

公开(公告)日：2019-01-29

申请号：US15270787

申请日：2016-09-20

Applicant: Intel Corporation

Inventor： Joshua Heppner ,  Debendra Mallik

IPC: H02S30/20 ,  H02S40/36 ,  H02S40/38 ,  H05K1/18 ,  H05K1/02 ,  H02J7/35

Abstract: A solar cell assembly includes a bendable substrate and multiple solar cells to be mounted over different surfaces of an electronic device. The bendable substrate includes an electrical contact to couple to an electrical contact on one of the surfaces of the electronic device. Thus, the electronic device only needs an electrical connection on one surface, and the solar cell assembly can mount solar cells on multiple surfaces to couple to the one electrical connection.

公开(公告)号：US20170186697A1

公开(公告)日：2017-06-29

申请号：US14757965

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Rajendra Dias ,  Takashi Kumamoto ,  Yoshishiro Tomita ,  Mitul Modi ,  Joshua Heppner ,  Eric Li

IPC: H01L23/552 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/565 ,  H01L23/3121 ,  H01L23/3135 ,  H01L25/16 ,  H01L2224/73204

Abstract: Electromagnetically shielded electronic device technology is disclosed. In an example, a method of making an electronic device package can comprise providing a substrate having a conductor pad and an electronic component. The method can also comprise forming a conformal insulating layer on the substrate and electronic component. The conformal insulating layer conforms to the electronic component. The method can further comprise exposing the conductor pad. In addition, the method can comprise forming an electrically conductive electromagnetic interference (EMI) layer on the insulating layer and in contact with the conductor pad.

公开(公告)号：US11024559B2

公开(公告)日：2021-06-01

申请号：US15579116

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Joshua Heppner ,  Mitul Modi

IPC: H01L23/48 ,  H01L23/552 ,  H01L25/065 ,  H01L21/768

Abstract: Semiconductor packages with electromagnetic interference (EMI) shielding structures and a method of manufacture therefor is disclosed. In some aspects, a shielding structure can serve as an enclosure formed by conductive material or by a mesh of such material that can be used to block electric fields emanating from one or more electronic components enclosed by the shielding structure at a global package level or local and/or compartment package level for semiconductor packages. In one embodiment, wire and/or ribbon bonding can be used to fabricate the shielding structure. For example, one or more wire and/or ribbon bonds can go from a connecting ground pad on one side of the package to a connecting ground pad on the other side of the package. This can be repeated multiple times at a pre-determined pitch necessary to meet the electrical requirements for shielding, e.g. less than or equal to approximately one half the wavelength of radiation generated by the electronic components being shielded.

公开(公告)号：US10224290B2

公开(公告)日：2019-03-05

申请号：US14757965

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Rajendra Dias ,  Takashi Kumamoto ,  Yoshishiro Tomita ,  Mitul Modi ,  Joshua Heppner ,  Eric Li

IPC: H01L21/56 ,  H01L23/552 ,  H01L23/31 ,  H01L25/16

Abstract: Electromagnetically shielded electronic device technology is disclosed. In an example, a method of making an electronic device package can comprise providing a substrate having a conductor pad and an electronic component. The method can also comprise forming a conformal insulating layer on the substrate and electronic component. The conformal insulating layer conforms to the electronic component. The method can further comprise exposing the conductor pad. In addition, the method can comprise forming an electrically conductive electromagnetic interference (EMI) layer on the insulating layer and in contact with the conductor pad.