公开(公告)号：US20210183846A1

公开(公告)日：2021-06-17

申请号：US17185504

申请日：2021-02-25

申请人： Intel Corporation

发明人： Jeffory L. Smalley ,  Thomas Holden ,  Russell J. Wunderlich ,  Farzaneh Yahyaei-Moayyed ,  Mohanraj Prabhugoud ,  Horthense Delphine Tamdem ,  Vijaya Boddu ,  Kaladhar Radhakrishnan ,  Timothy Glen Hanna ,  Krishna Bharath ,  Judy Amanor-Boadu ,  Mark A. Schmisseur ,  Srikant Nekkanty ,  Luis E. Rosales Galvan

IPC分类号： H01L25/18 ,  H01L23/498 ,  H01R12/71

摘要： A processor module comprises an integrated circuit component attached to a power interposer. One or more voltage regulator modules attach to the power interposer via interconnect sockets and the power interposer routes regulated power signals generated by the voltage regulator modules to the integrated circuit component. Input power signals are provided to the voltage regulator from the system board via straight pins, a cable connector, or another type of connector. The integrated circuit component's I/O signals are routed through the power interposer to a system board via a socket located between the power interposer and the socket. Not having to route regulated power signals from a system board through a socket to an integrated circuit component can result in a system board with fewer layers, which can reduce overall system cost, as well as creating more area available in the remaining layers for I/O signal entry to the socket.

公开(公告)号：US20230380067A1

公开(公告)日：2023-11-23

申请号：US17750016

申请日：2022-05-20

申请人： Intel Corporation

发明人： Raul Enriquez Shibayama ,  Kai Xiao ,  Carlos Alberto Lizalde Moreno ,  Luis E. Rosales Galvan

IPC分类号： H05K1/18

CPC分类号： H05K1/181 ,  H05K2201/10325 ,  H05K2201/10303 ,  H05K2201/10704

摘要： In one embodiment, a package substrate or main circuit board includes electrical connectors arranged in a compressed array pattern, wherein a distance between a connector and its neighboring connectors in a direction of compression is less than a distance between the connector and its neighboring connectors in other directions. The array pattern may be hexagonal or rectangular, and differential pairs of the electrical connectors may be arranged in the direction of compression.

公开(公告)号：US20200335432A1

公开(公告)日：2020-10-22

申请号：US16388136

申请日：2019-04-18

申请人： Intel Corporation

发明人： Gregorio R. Murtagian ,  Jeffory L. Smalley ,  Thomas T. Holden ,  Silver A. Estrada Rodriguez ,  Luis E. Rosales Galvan

IPC分类号： H01L23/498 ,  H01L21/67 ,  H05K1/18

摘要： A circuit board assembly includes at least one circuit board having a plurality of conductive layers, the at least one circuit board having a first face and an opposite second face. A first chip socket on the first face is positioned opposite of a second chip socket on the second face. In one example, each chip socket can receive a processor. The first and second chip sockets may be arranged in a mirrored fashion with respect to one another, or an overlapping but non-mirrored fashion. In any such arrangements, as fasteners are tightened to fully seat first and second chips respectively installed in the first and second chip sockets, forces applied to the first chip effectively neutralize or otherwise reduce opposing forces applied to the second chip, thereby reducing circuit board deflection.