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公开(公告)号:US20220199450A1
公开(公告)日:2022-06-23
申请号:US17132429
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Shawna M. Liff , Johanna M. Swan , Adel A. Elsherbini , Michael J. Baker , Aleksandar Aleksov , Feras Eid
IPC: H01L21/683 , H01L23/00 , H01L21/67
Abstract: Described herein are carrier assemblies, and related devices and methods. In some embodiments, a carrier assembly includes a carrier; a textured material including texturized microstructures coupled to the carrier; and microelectronic components mechanically coupled to the texturized microstructures. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; an electrode on the front side of the carrier; a dielectric material on the electrode; a charging contact on the back side coupled to the electrode; and microelectronic components electrostatically coupled to the front side of the carrier. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; electrodes on the front side; a dielectric material including texturized microstructures on the electrodes; charging contacts on the back side coupled to the plurality of electrodes; and microelectronic components mechanically and electrostatically coupled to the front side of the carrier.
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公开(公告)号:US20220199449A1
公开(公告)日:2022-06-23
申请号:US17132407
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Michael J. Baker , Shawna M. Liff , Javier A. Falcon
IPC: H01L21/683 , H01L23/00
Abstract: Described herein are carrier assemblies, and related devices and methods. In some embodiments, a carrier assembly includes a carrier; a textured material including texturized microstructures coupled to the carrier; and microelectronic components mechanically coupled to the texturized microstructures. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; an electrode on the front side of the carrier; a dielectric material on the electrode; a charging contact on the back side coupled to the electrode; and microelectronic components electrostatically coupled to the front side of the carrier. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; electrodes on the front side; a dielectric material including texturized microstructures on the electrodes; charging contacts on the back side coupled to the plurality of electrodes; and microelectronic components mechanically and electrostatically coupled to the front side of the carrier.
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公开(公告)号:US20220199453A1
公开(公告)日:2022-06-23
申请号:US17132372
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Michael J. Baker , Shawna M. Liff , Hsin-Wei Wang , Albert S. Lopez
IPC: H01L21/683 , H01L21/67 , H01L23/00
Abstract: Described herein are carrier assemblies, and related devices and methods. In some embodiments, a carrier assembly includes a carrier; a textured material including texturized microstructures coupled to the carrier; and microelectronic components mechanically coupled to the texturized microstructures. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; an electrode on the front side of the carrier; a dielectric material on the electrode; a charging contact on the back side coupled to the electrode; and microelectronic components electrostatically coupled to the front side of the carrier. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; electrodes on the front side; a dielectric material including texturized microstructures on the electrodes; charging contacts on the back side coupled to the plurality of electrodes; and microelectronic components mechanically and electrostatically coupled to the front side of the carrier.
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公开(公告)号:US09728425B1
公开(公告)日:2017-08-08
申请号:US15089491
申请日:2016-04-02
Applicant: INTEL CORPORATION
Inventor: Joshua D. Heppner , Serge Roux , Michael J. Baker , Javier A. Falcon
IPC: H01L21/56 , H01L21/67 , B29C35/08 , B29C70/84 , B29C70/80 , B29C70/88 , H01L23/31 , B29K63/00 , B29L31/34
CPC classification number: H01L21/563 , B29K2063/00 , B29K2995/0005 , B29L2031/3481 , H01L21/67126 , H01L23/3157 , H01L2224/16225 , H01L2224/73204 , H01L2224/743 , H01L2224/92125
Abstract: Space-efficient underfilling techniques for electronic assemblies are described. According to some such techniques, an underfilling method may comprise mounting an electronic element on a surface of a substrate, dispensing an underfill material upon the surface of the substrate within a dispense region for forming an underfill for the electronic element, and projecting curing rays upon at least a portion of the dispensed underfill material to inhibit an outward flow of dispensed underfill material from the dispense region, and the underfill material may comprise a non-visible light (NVL)-curable material. Other embodiments are described and claimed.
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公开(公告)号:US12142510B2
公开(公告)日:2024-11-12
申请号:US17132429
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Shawna M. Liff , Johanna M. Swan , Adel A. Elsherbini , Michael J. Baker , Aleksandar Aleksov , Feras Eid
IPC: H01L21/683 , H01L21/67 , H01L23/00
Abstract: Described herein are carrier assemblies, and related devices and methods. In some embodiments, a carrier assembly includes a carrier; a textured material including texturized microstructures coupled to the carrier; and microelectronic components mechanically coupled to the texturized microstructures. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; an electrode on the front side of the carrier; a dielectric material on the electrode; a charging contact on the back side coupled to the electrode; and microelectronic components electrostatically coupled to the front side of the carrier. In some embodiments, a carrier assembly includes a carrier having a front side and a back side; electrodes on the front side; a dielectric material including texturized microstructures on the electrodes; charging contacts on the back side coupled to the plurality of electrodes; and microelectronic components mechanically and electrostatically coupled to the front side of the carrier.
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公开(公告)号:US20210375719A1
公开(公告)日:2021-12-02
申请号:US17399882
申请日:2021-08-11
Applicant: Intel Corporation
Inventor: Feras Eid , Shrenik Kothari , Chandra M. Jha , Johanna M. Swan , Michael J. Baker , Shawna M. Liff , Thomas L. Sounart , Betsegaw K. Gebrehiwot , Shankar Devasenathipathy , Taylor Gaines , Digvijay Ashokkumar Raorane
IPC: H01L23/433 , H01L23/29 , H01L21/56 , H01L25/00 , H01L25/18 , H01L23/42 , H01L23/367 , H01L23/04 , H01L25/065 , H01L25/16 , H01L23/16
Abstract: A semiconductor device that has a semiconductor die coupled to a substrate. A mold compound encapsulates the semiconductor die, and at least one thermal conductive material section extends from adjacent the semiconductor die through the mold compound. The at least one conductive material section thus conveys heat from the semiconductor die through the mold compound.
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