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公开(公告)号:US20210405306A1
公开(公告)日:2021-12-30
申请号:US17474484
申请日:2021-09-14
Applicant: Intel Corporation
Inventor: Vivek RAGHUNATHAN , Myung Jin YIM
Abstract: Semiconductor package with one or more optical die(s) embedded therein is disclosed. The optical die(s) may have one or more overlying interconnect layers. Electrical contact to the optical die may be via the one or more overlying interconnect layers. An optical waveguide may be disposed next to the optical die and embedded within the semiconductor package. An optical fiber may be optically coupled to the optical waveguide.
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公开(公告)号:US20190302379A1
公开(公告)日:2019-10-03
申请号:US16317796
申请日:2016-07-14
Applicant: Intel Corporation
Inventor: Vivek RAGHUNATHAN , Myung Jin YIM
Abstract: Semiconductor package with one or more optical die(s) embedded therein is disclosed. The optical die(s) may have one or more overlying interconnect layers. Electrical contact to the optical die may be via the one or more overlying interconnect layers. An optical waveguide may be disposed next to the optical die and embedded within the semiconductor package. An optical fiber may be optically coupled to the optical waveguide.
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公开(公告)号:US20240353631A1
公开(公告)日:2024-10-24
申请号:US18761456
申请日:2024-07-02
Applicant: Intel Corporation
Inventor: Vivek RAGHUNATHAN , Myung Jin YIM
CPC classification number: G02B6/4206 , G02B6/122 , G02B6/132 , G02B6/42 , G02B6/4212 , G02B6/4225 , G02B6/428 , H01L25/167
Abstract: Semiconductor package with one or more optical die(s) embedded therein is disclosed. The optical die(s) may have one or more overlying interconnect layers. Electrical contact to the optical die may be via the one or more overlying interconnect layers. An optical waveguide may be disposed next to the optical die and embedded within the semiconductor package. An optical fiber may be optically coupled to the optical waveguide.
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公开(公告)号:US20190006549A1
公开(公告)日:2019-01-03
申请号:US16074758
申请日:2016-04-01
Applicant: Intel Corporation
Inventor: Myung Jin YIM , Seungjae LEE , Sandeep RAZDAN
IPC: H01L31/12 , H01L23/498 , H01L25/16 , H01L33/62 , H01L23/367 , H01L33/58
Abstract: Optoelectronic device modules having a silicon photonics transmitter die connected to a silicon interposer are described. In an example, the optoelectronic device module includes a silicon photonics transmitter die connected to a silicon interposer, and the silicon interposer is disposed between the silicon photonics transmitter die and a substrate. The silicon interposer provides an electrical interconnect between the silicon photonics transmitter die and the substrate, and reduces a likelihood that a hybrid silicon laser on the silicon photonics transmitter die will be damaged during module operation.
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公开(公告)号:US20170005453A1
公开(公告)日:2017-01-05
申请号:US15100265
申请日:2013-12-27
Applicant: Intel Corporation
Inventor: Myung Jin YIM , Ansheng LIU , Valentin YEPANECHNIKOV
IPC: H01S5/022 , H01L31/0232
CPC classification number: H01S5/02236 , H01L21/563 , H01L31/0232 , H01L2224/16225 , H01L2924/0002 , H01S5/0226 , H01S5/02476 , H01S5/18 , H01L2924/00
Abstract: Optoelectronic packaging assemblies are provided that are useful for optical data, transfer In high performance computing applications, board to board in data centers, memory to CPU, switch/FPGA (field programmable gate array) for chip to chip interconnects, and memory extension. The packaging assemblies provide fine pitch flip chip interconnects and chip stacking assemblies with good thermo-mechanical reliability. Underfill dams and optical overhang regions and are provided for optical interconnection.
Abstract translation: 提供光电包装组件,可用于光学数据,传输在高性能计算应用中,数据中心的板对板,CPU的存储器,用于芯片到芯片互连的开关/ FPGA(现场可编程门阵列)和存储器扩展。 封装组件提供精细的间距倒装芯片互连和芯片堆叠组件,具有良好的热机械可靠性。 底部填充坝和光学悬垂区域,并提供用于光学互连。
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