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公开(公告)号:US20190278022A1
公开(公告)日:2019-09-12
申请号:US16462077
申请日:2016-12-30
申请人: Intel Corporation
发明人: Rahul RAMASWAMY , Chia-Hong JAN , Walid HAFEZ , Neville DIAS , Hsu-Yu CHANG , Roman W. OLAC-VAW , Chen-Guan LEE
摘要: Embodiments of the invention include an electromagnetic waveguide and methods of forming electromagnetic waveguides. In an embodiment, the electromagnetic waveguide may include a first semiconductor fin extending up from a substrate and a second semiconductor fin extending up from the substrate. The fins may be bent towards each other so that a centerline of the first semiconductor fin and a centerline of the second semiconductor fin extend from the substrate at a non-orthogonal angle. Accordingly, a cavity may be defined by the first semiconductor fin, the second semiconductor fin, and a top surface of the substrate. Embodiments of the invention may include a metallic layer and a cladding layer lining the surfaces of the cavity. Additional embodiments may include a core formed in the cavity.
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公开(公告)号:US20190356032A1
公开(公告)日:2019-11-21
申请号:US16461554
申请日:2016-12-30
申请人: Intel Corporation
发明人: Rahul RAMASWAMY , Chia-Hong JAN , Walid HAFEZ , Neville DIAS , Hsu-Yu CHANG , Roman OLAC-VAW , Chen-Guan LEE
IPC分类号: H01P3/12 , H01P5/12 , H01P11/00 , H01L21/768 , H01L23/66 , H01L21/8234 , H01P3/127
摘要: Embodiments of the invention include an electromagnetic waveguide and methods of forming the electromagnetic waveguide. In an embodiment the electromagnetic waveguide includes a first spacer and a second spacer. In an embodiment, the first and second spacer each have a reentrant profile. The electromagnetic waveguide may also include a conductive body formed between in the first and second spacer, and a void formed within the conductive body. In an additional embodiment, the electromagnetic waveguide may include a first spacer and a second spacer. Additionally, the electromagnetic waveguide may include a first portion of a conductive body formed along sidewalls of the first and second spacer and a second portion of the conductive body formed between an upper portion of the first portion of the conductive body. In an embodiment, the first portion of the conductive body and the second portion of the conductive body define a void through the electromagnetic waveguide.
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公开(公告)号:US20170162503A1
公开(公告)日:2017-06-08
申请号:US15327338
申请日:2014-08-19
申请人: INTEL CORPORATION
发明人: Roman OLAC-VAW , Walid HAFEZ , Chia-Hong JAN , Hsu-Yu CHANG , Ting CHANG , Rahul RAMASWAMY , Pei-Chi LIU , Neville DIAS
IPC分类号: H01L23/525 , H01L29/78 , H01L29/423 , H01L21/768
摘要: A MOS antifuse with an accelerated dielectric breakdown induced by a void or seam formed in the electrode. In some embodiments, the programming voltage at which a MOS antifuse undergoes dielectric breakdown is reduced through intentional damage to at least part of the MOS antifuse dielectric. In some embodiments, damage may be introduced during an etchback of an electrode material which has a seam formed during backfilling of the electrode material into an opening having a threshold aspect ratio. In further embodiments, a MOS antifuse bit-cell includes a MOS transistor and a MOS antifuse. The MOS transistor has a gate electrode that maintains a predetermined voltage threshold swing, while the MOS antifuse has a gate electrode with a void accelerated dielectric breakdown.
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