公开(公告)号：US10725929B2

公开(公告)日：2020-07-28

申请号：US15483741

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Jianfang Zhu ,  Cristiano J. Ferreira ,  Bo Qiu ,  Ajit Krisshna Nandyal Lakshman ,  Nikhil Talpallikar ,  Deepak Gandiga Shivakumar ,  Brandt M. Guttridge ,  Kim Pallister ,  Frank J. Soqui ,  Anand Srivatsa ,  Travis T. Schluessler ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Altug Koker ,  Jonathan Kennedy

IPC: G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/10 ,  G06F12/0875 ,  G06F12/0811 ,  G06T1/60 ,  G06F3/06 ,  G06F12/06 ,  G06F12/02 ,  G06F12/109

Abstract: An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.

公开(公告)号：US10802984B2

公开(公告)日：2020-10-13

申请号：US16269058

申请日：2019-02-06

Applicant: Intel Corporation

Inventor： Vivekananthan Sanjeepan ,  Leena K. Puthiyedath ,  Chandan Apsangi ,  Nikhil Talpallikar ,  Abinash K. Barik

IPC: G06F12/1009 ,  G06F3/06 ,  G06F9/4401 ,  G06F9/455

Abstract: Examples may include techniques for persistent memory virtualization. Persistent memory maintained at one or more memory devices coupled with a host computing device may be allocated and assigned to a virtual machine (VM) hosted by the host computing device. The allocated persistent memory based on a file based virtual memory to be used by the VM. An extended page table (EPT) may be generated to map physical memory pages of the one or more memory devices to virtual logical blocks of the file based virtual memory. Elements of the VM then enumerate a presence of the assigned allocated persistent memory, create a virtual disk abstraction for the file based virtual memory and use the EPT to directly access the assigned allocated persistent memory.

公开(公告)号：US20180293173A1

公开(公告)日：2018-10-11

申请号：US15483741

申请日：2017-04-10

Applicant: Intel Corporation

Inventor： Jianfang Zhu ,  Cristiano J. Ferreira ,  Bo Qiu ,  Ajit Krisshna Nandyal Lakshman ,  Nikhil Talpallikar ,  Deepak Gandiga Shivakumar ,  Brandt M. Guttridge ,  Kim Pallister ,  Frank J. Soqui ,  Anand Srivatsa ,  Travis T. Schluessler ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Altug Koker ,  Jonathan Kennedy

IPC: G06F12/10

Abstract: An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.

公开(公告)号：US20240232096A9

公开(公告)日：2024-07-11

申请号：US18279029

申请日：2021-03-25

Applicant: Intel Corporation

Inventor： Sanjay Kumar ,  Phillip Lantz ,  Rajesh Sankaran ,  David Hansen ,  Evgeny V. Voevodin ,  Andrew Anderson ,  Lizhen You ,  Xin Zhou ,  Nikhil Talpallikar

IPC: G06F12/1009

CPC classification number: G06F12/1009

Abstract: An embodiment of an integrated circuit may comprise an array of hardware counters, and circuitry communicatively coupled to the array of hardware counters, the circuitry to count accesses to one or more selected pages of a memory with the array of hardware counters. Other embodiments are disclosed and claimed.

公开(公告)号：US20210011853A1

公开(公告)日：2021-01-14

申请号：US16939158

申请日：2020-07-27

Applicant: Intel Corporation

Inventor： Jianfang Zhu ,  Cristiano J. Ferreira ,  Bo Qiu ,  Ajit Krisshna Nandyal Lakshman ,  Nikhil Talpallikar ,  Deepak Gandiga Shivakumar ,  Brandt M. Guttridge ,  Kim Pallister ,  Frank J. Soqui ,  Anand Srivatsa ,  Travis T. Schluessler ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Altug Koker ,  Jonathan Kennedy

IPC: G06F12/10 ,  G06F12/0875 ,  G06F12/0811 ,  G06T1/60

Abstract: An embodiment of an electronic processing system may include an application processor, system memory communicatively coupled to the application processor, a graphics processor communicatively coupled to the application processor, graphics memory communicatively coupled to the graphics processor, and persistent storage media communicatively coupled to the application processor and the graphics processor to store one or more graphics assets, wherein the graphics processor is to access the one or more graphics asset mapped from the persistent storage media. The persistent storage media may include a low latency, high capacity, and byte-addressable nonvolatile memory. The one or more graphics assets may include one or more of a mega-texture and terrain data. Other embodiments are disclosed and claimed.

公开(公告)号：US20240134803A1

公开(公告)日：2024-04-25

申请号：US18279029

申请日：2021-03-24

Applicant: Intel Corporation

Inventor： Sanjay Kumar ,  Phillip Lantz ,  Rajesh Sankaran ,  David Hansen ,  Evgeny V. Voevodin ,  Andrew Anderson ,  Lizhen You ,  Xin Zhou ,  Nikhil Talpallikar

IPC: G06F12/1009

CPC classification number: G06F12/1009

Abstract: An embodiment of an integrated circuit may comprise an array of hardware counters, and circuitry communicatively coupled to the array of hardware counters, the circuitry to count accesses to one or more selected pages of a memory with the array of hardware counters. Other embodiments are disclosed and claimed.

公开(公告)号：US10210012B2

公开(公告)日：2019-02-19

申请号：US15193995

申请日：2016-06-27

Applicant: Intel Corporation

Inventor： Vivekananthan Sanjeepan ,  Leena K. Puthiyedath ,  Chandan Apsangi ,  Nikhil Talpallikar ,  Abinash K. Barik

IPC: G06F9/455 ,  G06F3/06 ,  G06F9/4401 ,  G06F12/1009

Abstract: Examples may include techniques for persistent memory virtualization. Persistent memory maintained at one or more memory devices coupled with a host computing device may be allocated and assigned to a virtual machine (VM) hosted by the host computing device. The allocated persistent memory based on a file based virtual memory to be used by the VM. An extended page table (EPT) may be generated to map physical memory pages of the one or more memory devices to virtual logical blocks of the file based virtual memory. Elements of the VM then enumerate a presence of the assigned allocated persistent memory, create a virtual disk abstraction for the file based virtual memory and use the EPT to directly access the assigned allocated persistent memory.

公开(公告)号：US20170371695A1

公开(公告)日：2017-12-28

申请号：US15193995

申请日：2016-06-27

Applicant: Intel Corporation

Inventor： Vivekananthan Sanjeepan ,  Leena K. Puthiyedath ,  Chandan Apsangi ,  Nikhil Talpallikar ,  Abinash K. Barik

IPC: G06F9/455 ,  G06F3/06 ,  G06F9/44 ,  G06F12/1009

CPC classification number: G06F9/45558 ,  G06F3/061 ,  G06F3/0619 ,  G06F3/065 ,  G06F3/0665 ,  G06F3/0683 ,  G06F3/0685 ,  G06F9/442 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/1032 ,  G06F2212/152

Abstract: Examples may include techniques for persistent memory virtualization. Persistent memory maintained at one or more memory devices coupled with a host computing device may be allocated and assigned to a virtual machine (VM) hosted by the host computing device. The allocated persistent memory based on a file based virtual memory to be used by the VM. An extended page table (EPT) may be generated to map physical memory pages of the one or more memory devices to virtual logical blocks of the file based virtual memory. Elements of the VM then enumerate a presence of the assigned allocated persistent memory, create a virtual disk abstraction for the file based virtual memory and use the EPT to directly access the assigned allocated persistent memory.