公开(公告)号：US09606935B2

公开(公告)日：2017-03-28

申请号：US14182618

申请日：2014-02-18

Applicant: Intel Corporation

Inventor： Ravishankar Rao ,  Nishit Shah

IPC: G06F3/00 ,  G06F12/0897 ,  G06F12/122 ,  G06F12/128 ,  G06F12/0811 ,  G06F12/1027

CPC classification number: G06F12/127 ,  G06F12/0811 ,  G06F12/0875 ,  G06F12/0897 ,  G06F12/1027 ,  G06F12/122 ,  G06F12/128 ,  G06F2212/1016 ,  G06F2212/452 ,  G06F2212/69

Abstract: A method for preventing non-temporal entries from entering small critical structures is disclosed. The method comprises transferring a first entry from a higher level memory structure to an intermediate buffer. It further comprises determining a second entry to be evicted from the intermediate buffer and a corresponding value associated with the second entry. Subsequently, responsive to a determination that the second entry is frequently accessed, the method comprises installing the second entry into a lower level memory structure. Finally, the method comprises installing the first entry into a slot previously occupied by the second entry in the intermediate buffer.