公开(公告)号：US11388074B2

公开(公告)日：2022-07-12

申请号：US16381237

申请日：2019-04-11

Applicant: Intel Corporation

Inventor： Peter McCarthy ,  Chris MacNamara ,  John Browne ,  Liang J. Ma ,  Liam Day

IPC: G06F1/32 ,  H04L43/00 ,  H04L43/10 ,  H04L41/0833 ,  H04L43/022 ,  H04L43/16 ,  G06F1/3209

Abstract: Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed.

公开(公告)号：US20220393960A1

公开(公告)日：2022-12-08

申请号：US17846947

申请日：2022-06-22

Applicant: Intel Corporation

Inventor： Peter McCarthy ,  Chris MacNamara ,  John Browne ,  Liang J. Ma ,  Liam Day

IPC: H04L43/10 ,  H04L41/0833 ,  H04L43/022 ,  H04L43/16 ,  G06F1/3209

Abstract: Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed.

公开(公告)号：US20190007330A1

公开(公告)日：2019-01-03

申请号：US15635581

申请日：2017-06-28

Applicant: Intel Corporation

Inventor： John J. Browne ,  Tomasz Kantecki ,  Chris Macnamara ,  Pierre Laurent ,  Sean Harte ,  Peter McCarthy ,  Jacqueline F. Jardim ,  Liang Ma

IPC: H04L12/873 ,  H04L12/883 ,  H04L12/879 ,  H04L12/927

Abstract: Technologies for network packet processing include a computing device that receives incoming network packets. The computing device adds the incoming network packets to an input lockless shared ring, and then classifies the network packets. After classification, the computing device adds the network packets to multiple lockless shared traffic class rings, with each ring associated with a traffic class and output port. The computing device may allocate bandwidth between network packets active during a scheduling quantum in the traffic class rings associated with an output port, schedule the network packets in the traffic class rings for transmission, and then transmit the network packets in response to scheduling. The computing device may perform traffic class separation in parallel with bandwidth allocation and traffic scheduling. In some embodiments, the computing device may perform bandwidth allocation and/or traffic scheduling on each traffic class ring in parallel. Other embodiments are described and claimed.

公开(公告)号：US20190042310A1

公开(公告)日：2019-02-07

申请号：US15951650

申请日：2018-04-12

Applicant: Intel Corporation

Inventor： John Browne ,  Chris MacNamara ,  Tomasz Kantecki ,  Peter McCarthy ,  Ma Liang ,  Mairtin O'Loingsigh ,  Rory Sexton ,  John Griffin ,  Nemanja Marjanovic ,  David Hunt

IPC: G06F9/48 ,  G06F1/32 ,  H04L12/851

Abstract: Technologies for power-aware scheduling include a computing device that receives network packets. The computing device classifies the network packets by priority level and then assigns each network packet to a performance group bin. The packets are assigned based on priority level and other performance criteria. The computing device schedules the network packets assigned to each performance group for processing by a processing engine such as a processor core. Network packets assigned to performance groups having a high priority level are scheduled for processing by processing engines with a high performance level. The computing device may select performance levels for processing engines based on processing workload of the network packets. The computing device may control the performance level of the processing engines, for example by controlling the frequency of processor cores. The processing workload may include packet encryption. Other embodiments are described and claimed.

公开(公告)号：US20190238442A1

公开(公告)日：2019-08-01

申请号：US16381237

申请日：2019-04-11

Applicant: Intel Corporation

Inventor： Peter McCarthy ,  Chris MacNamara ,  John Browne ,  Liang J. Ma ,  Liam Day

IPC: H04L12/26 ,  H04L12/24

CPC classification number: H04L43/10 ,  H04L41/0833 ,  H04L43/022

Abstract: Technologies for performance monitoring include a computing device having multiple processor cores. The computing device performs a training workload with a processor core by continuously polling an empty input queue. The computing device determines empty polling thresholds based on the empty polling workload. The computing device performs a packet processing workload with one or more processor cores by continuously polling input queues associated with network traffic. The computing device compares a measured number of empty polls performed by the packet processing workload against the empty polling thresholds. The computing device configures power management of one or more processor cores in response to the comparison. The computing device may determine empty polling trends and compare the measured number of empty polls and the empty polling trends to the empty polling thresholds. Other embodiments are described and claimed.

公开(公告)号：US11630693B2

公开(公告)日：2023-04-18

申请号：US15951650

申请日：2018-04-12

Applicant: Intel Corporation

Inventor： John Browne ,  Chris MacNamara ,  Tomasz Kantecki ,  Peter McCarthy ,  Liang Ma ,  Mairtin O'Loingsigh ,  Rory Sexton ,  John Griffin ,  Nemanja Marjanovic ,  David Hunt

IPC: G06F9/46 ,  G06F9/48 ,  H04L47/24 ,  G06F1/329 ,  H04L9/40 ,  H04L47/6275 ,  G06F1/3209 ,  G06F1/3296 ,  G06F1/3234 ,  H04L47/625 ,  G06F9/50 ,  G06F21/60

Abstract: Technologies for power-aware scheduling include a computing device that receives network packets. The computing device classifies the network packets by priority level and then assigns each network packet to a performance group bin. The packets are assigned based on priority level and other performance criteria. The computing device schedules the network packets assigned to each performance group for processing by a processing engine such as a processor core. Network packets assigned to performance groups having a high priority level are scheduled for processing by processing engines with a high performance level. The computing device may select performance levels for processing engines based on processing workload of the network packets. The computing device may control the performance level of the processing engines, for example by controlling the frequency of processor cores. The processing workload may include packet encryption. Other embodiments are described and claimed.

公开(公告)号：US10999209B2

公开(公告)日：2021-05-04

申请号：US15635581

申请日：2017-06-28

Applicant: Intel Corporation

Inventor： John J. Browne ,  Tomasz Kantecki ,  Chris Macnamara ,  Pierre Laurent ,  Sean Harte ,  Peter McCarthy ,  Jacqueline F. Jardim ,  Liang Ma

IPC: H04L12/873 ,  H04L12/883 ,  H04L12/879 ,  H04L12/927 ,  H04L12/863 ,  H04L12/869

Abstract: Technologies for network packet processing include a computing device that receives incoming network packets. The computing device adds the incoming network packets to an input lockless shared ring, and then classifies the network packets. After classification, the computing device adds the network packets to multiple lockless shared traffic class rings, with each ring associated with a traffic class and output port. The computing device may allocate bandwidth between network packets active during a scheduling quantum in the traffic class rings associated with an output port, schedule the network packets in the traffic class rings for transmission, and then transmit the network packets in response to scheduling. The computing device may perform traffic class separation in parallel with bandwidth allocation and traffic scheduling. In some embodiments, the computing device may perform bandwidth allocation and/or traffic scheduling on each traffic class ring in parallel. Other embodiments are described and claimed.