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公开(公告)号：US20170351641A1
公开(公告)日：2017-12-07
申请号：US15490743
申请日：2017-04-18
Applicant: Intel Corporation
Inventor： ZEEV SPERBER , ROBERT VALENTINE , SHLOMO RAIKIN , STANISLAV SHWARTSMAN , GAL OFIR , IGOR YANOVER , GUY PATKIN , OFER LEVY
CPC classification number: G06F15/7839 , G06F9/30018 , G06F9/30036 , G06F9/30043 , G06F9/30145 , G06F9/345 , G06F9/3808 , G06F9/383
Abstract: Methods and apparatus are disclosed using an index array and finite state machine for scatter/gather operations. Embodiment of apparatus may comprise: decode logic to decode scatter/gather instructions and generate micro-operations. An index array holds a set of indices and a corresponding set of mask elements. A finite state machine facilitates the scatter operation. Address generation logic generates an address from an index of the set of indices for at least each of the corresponding mask elements having a first value. Storage is allocated in a buffer for each of the set of addresses being generated. Data elements corresponding to the set of addresses being generated are copied to the buffer. Addresses from the set are accessed to store data elements if a corresponding mask element has said first value and the mask element is changed to a second value responsive to completion of their respective stores.
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公开(公告)号：US20180060049A1
公开(公告)日：2018-03-01
申请号：US15615798
申请日：2017-06-06
Applicant: Intel Corporation
Inventor： DAVID J. SAGER , RUCHIRA SASANKA , RON GABOR , SHLOMO RAIKIN , JOSEPH NUZMAN , LEEOR PELED , JASON A. DOMER , HO-SEOP KIM , YOUFENG WU , KOICHI YAMADA , TIN-FOOK NGAI , HOWARD H. CHEN , JAYARAM BOBBA , JEFFREY J. COOK , OMAR M. SHAIKH , SURESH SRINIVAS
Abstract: Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program into multiple parallel threads are described. In some embodiments, the systems and apparatuses execute a method of original code decomposition and/or generated thread execution.
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