公开(公告)号：US20240195789A1

公开(公告)日：2024-06-13

申请号：US18442457

申请日：2024-02-15

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi ,  Uzair Qureshi ,  Lokpraveen Mosur ,  Patrick Fleming ,  Stephen Doyle ,  Brian Andrew Keating ,  Ned M. Smith

IPC: H04L9/40 ,  G06F13/28 ,  G06F21/60

CPC classification number: H04L63/0435 ,  G06F13/28 ,  G06F21/602 ,  H04L63/166

Abstract: A computing device includes a direct memory access (DMA) engine coupled to a memory, a network interface, and processing circuitry. The processing circuitry is to perform a secure exchange with a second computing device to negotiate a shared encryption key, based on a request for data received via the network interface from the second computing device. The DMA engine is to retrieve the data from a storage location based on an encryption command. The encryption command indicates the storage location. The DMA engine is to encrypt the data based on the shared encryption key to generate encrypted data, and store the encrypted data in the memory.

公开(公告)号：US20220337481A1

公开(公告)日：2022-10-20

申请号：US17737413

申请日：2022-05-05

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Ned M. Smith ,  Timothy Verrall ,  Uzair Qureshi

IPC: H04L41/084 ,  H04L41/0869 ,  H04L49/00 ,  H04L47/78 ,  H04L41/5054 ,  G06F9/48 ,  G06F9/50 ,  G06F9/54 ,  G06F11/30 ,  H04L9/06 ,  H04L9/32 ,  G06F1/20 ,  H04L67/10 ,  H04W4/08 ,  H04W12/04

Abstract: Various approaches for deployment and use of configurable edge computing platforms are described. In an edge computing system, an edge computing device includes hardware resources that can be composed from a configuration of chiplets, as the chiplets are disaggregated for selective use and deployment (for compute, acceleration, memory, storage, or other resources). In an example, configuration operations are performed to: identify a condition for use of the hardware resource, based on an edge computing workload received at the edge computing device; obtain, determine, or identify properties of a configuration for the hardware resource that are available to be implemented with the chiplets, with the configuration enabling the hardware resource to satisfy the condition for use of the hardware resource; and compose the chiplets into the configuration, according to the properties of the configuration, to enable the use of the hardware resource for the edge computing workload.

公开(公告)号：US20230217253A1

公开(公告)日：2023-07-06

申请号：US17922280

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Stephen Palermo ,  Srihari Makineni ,  Shubha Bommalingaiahnapallya ,  Rany ElSayed ,  Lokpraveen Mosur ,  Neelam Chandwani ,  Pinkesh Shah ,  Rajesh Gadiyar ,  Shrikant M. Shah ,  Uzair Qureshi

IPC: H04W12/125 ,  G06F9/50

CPC classification number: H04W12/125 ,  G06F9/505

Abstract: Systems, methods, and apparatus for workload optimized central processing units are disclosed herein. An example apparatus includes a workload analyzer to determine an application ratio associated with the workload, the application ratio based on an operating frequency to execute the workload, a hardware configurator to configure, before execution of the workload, at least one of (i) one or more cores of the processor circuitry based on the application ratio or (ii) uncore logic of the processor circuitry based on the application ratio, and a hardware controller to initiate the execution of the workload with the at least one of the one or more cores or the uncore logic.

公开(公告)号：US11388054B2

公开(公告)日：2022-07-12

申请号：US16723118

申请日：2019-12-20

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Ned M. Smith ,  Timothy Verrall ,  Uzair Qureshi

IPC: H04L12/24 ,  H04L12/931 ,  H04L12/911 ,  G06F9/48 ,  G06F9/50 ,  G06F9/54 ,  G06F11/30 ,  H04L9/06 ,  H04L9/32 ,  G06F1/20 ,  H04L29/08 ,  H04W4/08 ,  H04W12/04 ,  H04L41/084 ,  H04L41/0869 ,  H04L49/00 ,  H04L47/78 ,  H04L41/5054 ,  H04L67/10

Abstract: Various approaches for deployment and use of configurable edge computing platforms are described. In an edge computing system, an edge computing device includes hardware resources that can be composed from a configuration of chiplets, as the chiplets are disaggregated for selective use and deployment (for compute, acceleration, memory, storage, or other resources). In an example, configuration operations are performed to: identify a condition for use of the hardware resource, based on an edge computing workload received at the edge computing device; obtain, determine, or identify properties of a configuration for the hardware resource that are available to be implemented with the chiplets, with the configuration enabling the hardware resource to satisfy the condition for use of the hardware resource; and compose the chiplets into the configuration, according to the properties of the configuration, to enable the use of the hardware resource for the edge computing workload.

公开(公告)号：US20210014047A1

公开(公告)日：2021-01-14

申请号：US17032824

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Ned M. Smith ,  Uzair Qureshi ,  Timothy Verrall

IPC: H04L9/08 ,  G06F21/60 ,  G06F21/62

Abstract: An apparatus to manage a data lake is disclosed. A disclosed example apparatus includes a location selector to select an edge device to store the data lake, a key generator to, in response to an indication that a service is authorized to access the data lake, generate an encryption key corresponding to the data lake and generate a key wrapping key corresponding to the edge device, and a key distributor to wrap the encryption key using the key wrapping key, and distribute the encryption key and the key wrapping key to the edge device, the encryption key to enable the service on the edge device to access the data lake.

公开(公告)号：US11943207B2

公开(公告)日：2024-03-26

申请号：US17032391

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Kshitij Arun Doshi ,  Uzair Qureshi ,  Lokpraveen Mosur ,  Patrick Fleming ,  Stephen Doyle ,  Brian Andrew Keating ,  Ned M. Smith

IPC: H04L9/40 ,  G06F13/28 ,  G06F21/60

CPC classification number: H04L63/0435 ,  G06F13/28 ,  G06F21/602 ,  H04L63/166

Abstract: Methods, systems, and use cases for one-touch inline cryptographic data security are discussed, including an edge computing device with a network communications circuitry (NCC), an enhanced DMA engine coupled to a memory device and including a cryptographic engine, and processing circuitry configured to perform a secure exchange with a second edge computing device to negotiate a shared symmetric encryption key, based on a request for data. An inline encryption command for communication to the enhanced DMA engine is generated. The inline encryption command includes a first address associated with a storage location storing the data, a second address associated with a memory location in the memory device, and the shared symmetric encryption key. The data is retrieved from the storage location using the first address, the data is encrypted using the shared symmetric encryption key, and the encrypted data is stored in the memory location using the second address.

公开(公告)号：US11831507B2

公开(公告)日：2023-11-28

申请号：US17737413

申请日：2022-05-05

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Kshitij Arun Doshi ,  Ned M. Smith ,  Timothy Verrall ,  Uzair Qureshi

IPC: H04L41/084 ,  H04L41/0869 ,  H04L49/00 ,  H04L47/78 ,  H04L41/5054 ,  G06F9/48 ,  G06F9/50 ,  G06F9/54 ,  G06F11/30 ,  H04L9/06 ,  H04L9/32 ,  G06F1/20 ,  H04L67/10 ,  H04W4/08 ,  H04W12/04

CPC classification number: H04L41/0843 ,  G06F1/206 ,  G06F9/4881 ,  G06F9/505 ,  G06F9/5094 ,  G06F9/542 ,  G06F11/3006 ,  H04L9/0637 ,  H04L9/3213 ,  H04L9/3247 ,  H04L41/0869 ,  H04L41/5054 ,  H04L47/781 ,  H04L49/70 ,  H04L67/10 ,  H04W4/08 ,  H04W12/04 ,  G06F2209/5021

Abstract: Various approaches for deployment and use of configurable edge computing platforms are described. In an edge computing system, an edge computing device includes hardware resources that can be composed from a configuration of chiplets, as the chiplets are disaggregated for selective use and deployment (for compute, acceleration, memory, storage, or other resources). In an example, configuration operations are performed to: identify a condition for use of the hardware resource, based on an edge computing workload received at the edge computing device; obtain, determine, or identify properties of a configuration for the hardware resource that are available to be implemented with the chiplets, with the configuration enabling the hardware resource to satisfy the condition for use of the hardware resource; and compose the chiplets into the configuration, according to the properties of the configuration, to enable the use of the hardware resource for the edge computing workload.

公开(公告)号：US11809252B2

公开(公告)日：2023-11-07

申请号：US16524868

申请日：2019-07-29

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Suraj Prabhakaran ,  Karthik Kumar ,  Uzair Qureshi ,  Timothy Verrall

IPC: G06F1/26 ,  G06F1/30 ,  G06F11/14

CPC classification number: G06F1/30 ,  G06F1/263 ,  G06F11/1474 ,  G06F2201/87

Abstract: Examples described herein relate to management of battery-use by one or more computing resources in the event of a power outage. Data used by one or more computing resources can be backed-up using battery power. Battery power is allocated to data back-up operations based at least on one or more of: criticality level of data, priority of an application that processes the data, or priority level of resource. The computing resource can back-up data to a persistent storage media. The computing resource can store a log of data that is backed-up or not backed-up. The log can be used by the computing resource to access the backed-up data for continuing to process the data and to determine what data is not available for processing.

公开(公告)号：US20240407142A1

公开(公告)日：2024-12-05

申请号：US18799263

申请日：2024-08-09

Applicant: INTEL CORPORATION

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Uzair Qureshi ,  Marcos Carranza ,  Marek Piotrowski

IPC: H05K7/20

Abstract: Hybrid and adaptive cooling systems are described. A method comprises selecting a cooling system type from a set of cooling system types of a hybrid cooling system to cool an electronic component of an electronic device, generating a control directive to activate a cooling component of the cooling system type, and performing thermal management of the electronic component of the electronic device using the cooling component of the cooling system type. Other embodiments are described and claimed.

公开(公告)号：US20210014301A1

公开(公告)日：2021-01-14

申请号：US17033120

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Kshitij Doshi ,  Francesc Guim Bernat ,  Ned Smith ,  Timothy Verrall ,  Uzair Qureshi

IPC: H04L29/08

Abstract: Methods, apparatus, systems and articles of manufacture to select a location of execution of a computation are disclosed. An example apparatus includes a cache digest interface to identify a node capable of performing a computation. A compute plan solver is to obtain a cost estimate of performing the computation from the node. Privacy weighting circuitry is to apply a privacy weighting value to the cost estimate to determine a weighted cost estimate. The compute plan solver is to select the node for performance of the computation based on the weighted cost estimate. A plan executor is to transmit a request for the selected node to perform the computation.