公开(公告)号：US09977477B2

公开(公告)日：2018-05-22

申请号：US14497476

申请日：2014-09-26

Applicant: Intel Corporation

Inventor： Sunil Kumar C. R. ,  Aruna Kumar ,  Prakash K. Radhakrishnan

IPC: G06F1/32 ,  G06F1/26

CPC classification number: G06F1/266 ,  G06F1/26 ,  G06F1/3225 ,  G06F1/3243 ,  G06F1/3293 ,  G06F1/3296 ,  G06F15/163

Abstract: In an embodiment, processor includes at least one logic circuit to generate information to be output from the processor; an input/output (IO) interface circuit coupled to the at least one logic circuit to receive and transmit the information; a voltage regulator to provide an operating voltage to the IO interface circuit; and a controller to control the voltage regulator to provide the operating voltage at an adjusted level from a nominal operating voltage based on a process variation of at least a portion of a die including the IO interface circuit. Other embodiments are described and claimed.

公开(公告)号：US10943558B2

公开(公告)日：2021-03-09

申请号：US15199125

申请日：2016-06-30

Applicant: Intel Corporation

Inventor： Aruna Kumar L. S. ,  Sunil Kumar C. R. ,  Sanjib Basu ,  Prakash K. Radhakrishnan

IPC: G09G5/00 ,  G09G5/36

Abstract: An integrated circuit is described. The integrated circuit includes a display controller having a driver. The display controller is configurable to select two or more display interfaces. The driver is designed to drive respective signals for the two or more display interfaces through a single output.