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79 条记录 (耗时 0.039 秒)

    Data distribution in an array of neural network cores
    1.
    发明授权
    Data distribution in an array of neural network cores 有权

    公开(公告)号：US11238347B2

    公开(公告)日：2022-02-01

    申请号：US16146632

    申请日：2018-09-28

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Brian Taba ,  Andrew S. Cassidy ,  Myron D. Flickner ,  Pallab Datta ,  Hartmut Penner ,  Rathinakumar Appuswamy ,  Jun Sawada ,  John V. Arthur ,  Dharmendra S. Modha ,  Steven K. Esser ,  Jennifer Klamo

    IPC分类号： G06N3/08 ,  G06F17/16 ,  G06N3/06 ,  G06N3/04

    摘要： Parallel processing among arrays of physical neural cores is provided. An array of neural cores is adapted to compute, in parallel, an output activation tensor of a neural network layer. A network is operatively connected to each of the neural cores. The output activation tensor is distributed across the neural cores. An input activation tensor is distributed across the neural cores. A weight tensor is distributed across the neural cores. Each neural core's computation comprises multiplying elements of a portion of the input activation tensor at that core with elements of a portion of the weight tensor at that core, and storing the summed products in a partial sum corresponding to an element of the output activation tensor. Each element of the output activation tensor is computed by accumulating all of the partial sums corresponding to that element via the network. The partial sums for each element of the output activation tensor are computed in a sequence of steps whose order is described by tracing a path through the weight tensor that visits every weight tensor element that contributes to any partial sum.

    Extracting motion saliency features from video using a neurosynaptic system
    2.
    发明授权
    Extracting motion saliency features from video using a neurosynaptic system 有权

    公开(公告)号：US11227180B2

    公开(公告)日：2022-01-18

    申请号：US16653712

    申请日：2019-10-15

    申请人： International Business Machines Corporation

    发明人： Alexander Andreopoulos ,  Steven K. Esser ,  Dharmendra S. Modha

    IPC分类号： G06K9/46 ,  G06K9/66 ,  G06N3/063 ,  G06N3/04 ,  G06K9/00

    摘要： Embodiments of the invention provide a computer-readable medium of visual saliency estimation comprising receiving an input video of image frames. Each image frame has one or more channels, and each channel has one or more pixels. The computer-readable medium further comprises, for each channel of each image frame, generating corresponding neural spiking data based on a pixel intensity of each pixel of the channel, generating a corresponding multi-scale data structure based on the corresponding neural spiking data, and extracting a corresponding map of features from the corresponding multi-scale data structure. The multi-scale data structure comprises one or more data layers, wherein each data layer represents a spike representation of pixel intensities of a channel at a corresponding scale. The computer-readable medium further comprises encoding each map of features extracted as neural spikes.

    EXTRACTING MOTION SALIENCY FEATURES FROM VIDEO USING A NEUROSYNAPTIC SYSTEM
    4.
    发明申请
    EXTRACTING MOTION SALIENCY FEATURES FROM VIDEO USING A NEUROSYNAPTIC SYSTEM 审中-公开

    公开(公告)号：US20200050883A1

    公开(公告)日：2020-02-13

    申请号：US16653712

    申请日：2019-10-15

    申请人： International Business Machines Corporation

    发明人： Alexander Andreopoulos ,  Steven K. Esser ,  Dharmendra S. Modha

    IPC分类号： G06K9/46 ,  G06K9/66 ,  G06K9/00 ,  G06N3/063 ,  G06N3/04

    摘要： Embodiments of the invention provide a computer-readable medium of visual saliency estimation comprising receiving an input video of image frames. Each image frame has one or more channels, and each channel has one or more pixels. The computer-readable medium further comprises, for each channel of each image frame, generating corresponding neural spiking data based on a pixel intensity of each pixel of the channel, generating a corresponding multi-scale data structure based on the corresponding neural spiking data, and extracting a corresponding map of features from the corresponding multi-scale data structure. The multi-scale data structure comprises one or more data layers, wherein each data layer represents a spike representation of pixel intensities of a channel at a corresponding scale. The computer-readable medium further comprises encoding each map of features extracted as neural spikes.

    CANONICAL SPIKING NEURON NETWORK FOR SPATIOTEMPORAL ASSOCIATIVE MEMORY
    6.
    发明申请
    CANONICAL SPIKING NEURON NETWORK FOR SPATIOTEMPORAL ASSOCIATIVE MEMORY 审中-公开

    公开(公告)号：US20180018557A1

    公开(公告)日：2018-01-18

    申请号：US15494343

    申请日：2017-04-21

    申请人： International Business Machines Corporation

    发明人： Steven K. Esser ,  Dharmendra S. Modha ,  Anthony Ndirango

    IPC分类号： G06N3/04 ,  G06N3/08 ,  G06N3/063

    CPC分类号： G06N3/049 ,  G06N3/063 ,  G06N3/08

    摘要： Embodiments of the invention relate to canonical spiking neurons for spatiotemporal associative memory. An aspect of the invention provides a spatiotemporal associative memory including a plurality of electronic neurons having a layered neural net relationship with directional synaptic connectivity. The plurality of electronic neurons configured to detect the presence of a spatiotemporal pattern in a real-time data stream, and extract the spatiotemporal pattern. The plurality of electronic neurons are further configured to, based on learning rules, store the spatiotemporal pattern in the plurality of electronic neurons, and upon being presented with a version of the spatiotemporal pattern, retrieve the stored spatiotemporal pattern.

    Reconfigurable and customizable general-purpose circuits for neural networks
    8.
    发明授权
    Reconfigurable and customizable general-purpose circuits for neural networks 有权
    可重构和可定制的神经网络通用电路

    公开(公告)号：US09460383B2

    公开(公告)日：2016-10-04

    申请号：US14475409

    申请日：2014-09-02

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Bernard V. Brezzo ,  Leland Chang ,  Steven K. Esser ,  Daniel J. Friedman ,  Yong Liu ,  Dharmendra S. Modha ,  Robert K. Montoye ,  Bipin Rajendran ,  Jae-sun Seo ,  Jose A. Tierno

    IPC分类号： G06N3/063

    CPC分类号： G06N3/063 ,  G06N3/04 ,  G06N3/049 ,  G06N3/082

    摘要： A reconfigurable neural network circuit is provided. The reconfigurable neural network circuit comprises an electronic synapse array including multiple synapses interconnecting a plurality of digital electronic neurons. Each neuron comprises an integrator that integrates input spikes and generates a signal when the integrated inputs exceed a threshold. The circuit further comprises a control module for reconfiguring the synapse array. The control module comprises a global final state machine that controls timing for operation of the circuit, and a priority encoder that allows spiking neurons to sequentially access the synapse array.

    摘要翻译： 提供可重构神经网络电路。 可重构神经网络电路包括电子突触阵列，其包括互连多个数字电子神经元的多个突触。 每个神经元包括积分器，其对输入尖峰进行积分，并且当集成输入超过阈值时产生信号。 电路还包括用于重新配置突触阵列的控制模块。 控制模块包括控制电路操作的定时的全局最终状态机，以及允许加标神经元依次访问突触阵列的优先编码器。

    FEATURE EXTRACTION USING A NEUROSYNAPTIC SYSTEM
    10.
    发明申请
    FEATURE EXTRACTION USING A NEUROSYNAPTIC SYSTEM 有权
    使用神经病学系统的特征提取

    公开(公告)号：US20160004961A1

    公开(公告)日：2016-01-07

    申请号：US14322776

    申请日：2014-07-02

    申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

    发明人： Rathinakumar Appuswamy ,  Steven K. Esser ,  Dharmendra S. Modha

    IPC分类号： G06N3/08 ,  G06N3/04

    CPC分类号： G06N3/063 ,  G06N3/04 ,  G06N3/049 ,  G06N3/08

    摘要： Embodiments of the invention provide a neurosynaptic system comprising a first set of one or more neurosynaptic core circuits configured to receive input data comprising multiple input regions, and extract a first set of features from the input data. The features of the first set are computed based on different input regions. The system further comprises a second set of one or more neurosynaptic core circuits configured to receive the first set of features, and generate a second set of features by combining the first set of features based on synaptic connectivity information of the second set of core circuits.

    摘要翻译： 本发明的实施例提供了神经突触系统，其包括被配置为接收包括多个输入区域的输入数据的第一组一个或多个神经突触核心电路，并且从输入数据提取第一组特征。 基于不同的输入区域来计算第一组的特征。 该系统还包括第二组一个或多个神经突触核心电路，其被配置为接收第一组特征，并且基于第二组核心电路集合的突触连接信息，通过组合第一组特征来生成第二组特征。