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1.发明申请公开(公告)号：US20030218198A1
公开(公告)日：2003-11-27
申请号：US10460717
申请日：2003-06-12
IPC分类号： H01L027/108 , H01L029/76
CPC分类号： G11C11/412 , H01L27/1104 , H01L27/1203
摘要： Silicon on insulator (SOI) field effect transistors (FET) with a shared body contact, a SRAM cell and array including the SOI FETs and the method of forming the SOI FETs. The SRAM cell has a hybrid SOI/bulk structure wherein the source/drain diffusions do not penetrate to the underlying insulator layer, resulting in a FET in the surface of an SOI layer with a body or substrate contact formed at a shared contact. FETs are formed on SOI silicon islands located on a BOX layer and isolated by shallow trench isolation (STI). NFET islands in the SRAM cells include a body contact to a P-type diffusion in the NFET island. Each NFET in the SRAM cells include at least one shallow source/drain diffusion that is shallower than the island thickness. A path remains under the shallow diffusions between NFET channels and the body contact. The P-type body contact diffusion is a deep diffusion, the full thickness of the island. Bit line diffusions shared by SRAM cells on adjacent wordlines may be deep diffusions.
摘要翻译： 具有共用体接触的绝缘体上硅（SOI）场效应晶体管（FET），包括SOI FET的SRAM单元和阵列以及形成SOI FET的方法。 SRAM单元具有混合SOI /体结构，其中源极/漏极扩散不穿透到下面的绝缘体层，导致SOI层的表面中的FET，其具有在共享接触处形成的主体或衬底接触。 FET形成在位于BOX层上的SOI硅岛上，并通过浅沟槽隔离（STI）隔离。 SRAM单元中的NFET岛包括与NFET岛中的P型扩散的体接触。 SRAM单元中的每个NFET包括比岛厚度浅的至少一个浅源/漏扩散。 路径保持在NFET通道与身体接触之间的浅扩散之下。 P型身体接触扩散是深度扩散，岛的全部厚度。 SRAM单元在相邻字线上共享的位线扩散可能是深度扩散。
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2.发明申请STI stress modification by nitrogen plasma treatment for improving performance in small width devices 有权通过氮等离子体处理进行STI应力改进，以改善小宽度器件的性能公开(公告)号：US20040238914A1
公开(公告)日：2004-12-02
申请号：US10751831
申请日：2004-01-05
IPC分类号： H01L029/00
CPC分类号： H01L29/7842 , H01L21/3185 , H01L21/76237 , H01L29/1033
摘要： A method for modulating the stress caused by bird beak formation of small width devices by a nitrogen plasma treatment. The nitrogen plasma process forms a nitride liner about the trench walls that serves to prevent the formation of bird beaks in the isolation region during a subsequent oxidation step. In one embodiment, the plasma nitridation process occurs after trench etching, but prior to trench fill. In yet another embodiment, the plasma nitridation process occurs after trench fill. In yet another embodiment, a block mask is formed over predetermined active areas of the etched substrate prior to the plasma nitridation process. This embodiment is used in protecting the PFET device area from the plasma nitridation process thereby providing a means to form a PFET device area in which stress caused by bird beak formation increases the device performance of the PFET.
摘要翻译： 一种通过氮等离子体处理调节小宽度装置的鸟嘴形成引起的应力的方法。 氮等离子体工艺形成围绕沟槽壁的氮化物衬垫，其用于在随后的氧化步骤期间防止在隔离区中形成鸟嘴。 在一个实施例中，等离子体氮化处理发生在沟槽蚀刻之后，但在沟槽填充之前。 在另一个实施例中，等离子体氮化处理发生在沟槽填充之后。 在另一个实施例中，在等离子体氮化处理之前，在蚀刻的衬底的预定有效区域上形成块掩模。 该实施例用于保护PFET器件区域免受等离子体氮化处理，从而提供形成PFET器件区域的装置，其中由鸟嘴形成引起的应力增加了PFET的器件性能。
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3.发明申请公开(公告)号：US20020149058A1
公开(公告)日：2002-10-17
申请号：US10064305
申请日：2002-07-01
发明人： James A. Culp , Jawahar P. Nayak , Werner A. Rausch , Melanie J. Sherony , Steven H. Voldman , Noah D. Zamdmer
IPC分类号： H01L027/01 , H01L027/12 , H01L031/0392
CPC分类号： H01L29/4966 , H01L29/1083 , H01L29/7835
摘要： A semiconductor chip includes a semiconductor substrate having a rectifying contact diffusion and a non-rectifying contact diffusion. A halo diffusion is adjacent the rectifying contact diffusion and no halo diffusion is adjacent the non-rectifying contact diffusion. The rectifying contact diffusion can be a source/drain diffusion of an FET to improve resistance to punch-through. The non-rectifying contact diffusion may be an FET body contact, a lateral diode contact, or a resistor or capacitor contact. Avoiding a halo for non-rectifying contacts reduces series resistance and improves device characteristics. In another embodiment on a chip having devices with halos adjacent diffusions, no halo diffusion is adjacent a rectifying contact diffusion of a lateral diode, significantly improving ideality of the diode and increasing breakdown voltage.
摘要翻译： 半导体芯片包括具有整流接触扩散和非整流接触扩散的半导体衬底。 光晕扩散与整流接触扩散相邻，并且没有晕圈扩散与非整流接触扩散相邻。 整流接触扩散可以是FET的源极/漏极扩散，以提高耐穿透性。 非整流接触扩散可以是FET体接触，横向二极管接触或电阻或电容器接触。 避免使用非整流触点的光圈可以降低串联电阻并提高器件特性。 在具有相邻扩散的光晕的器件的芯片的另一实施例中，没有卤素扩散与横向二极管的整流接触扩散相邻，从而显着地提高了二极管的理想性并增加了击穿电压。
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4.发明申请STI STRESS MODIFICATION BY NITROGEN PLASMA TREATMENT FOR IMPROVING PERFORMANCE IN SMALL WIDTH DEVICES 失效用于改善小宽度装置性能的硝基等离子体处理的STI应力变化公开(公告)号：US20040242010A1
公开(公告)日：2004-12-02
申请号：US10250047
申请日：2003-05-30
IPC分类号： H01L021/302
CPC分类号： H01L29/7842 , H01L21/3185 , H01L21/76237 , H01L29/1033
摘要： A method for modulating the stress caused by bird beak formation of small width devices by a nitrogen plasma treatment. The nitrogen plasma process forms a nitride liner about the trench walls that serves to prevent the formation of bird beaks in the isolation region during a subsequent oxidation step. In one embodiment, the plasma nitridation process occurs after trench etching, but prior to trench fill. In yet another embodiment, the plasma nitridation process occurs after trench fill. In yet another embodiment, a block mask is formed over predetermined active areas of the etched substrate prior to the plasma nitridation process. This embodiment is used in protecting the PFET device area from the plasma nitridation process thereby providing a means to form a PFET device area in which stress caused by bird beak formation increases the device performance of the PFET.
摘要翻译： 一种通过氮等离子体处理调节小宽度装置的鸟嘴形成引起的应力的方法。 氮等离子体工艺形成围绕沟槽壁的氮化物衬垫，其用于在随后的氧化步骤期间防止在隔离区中形成鸟嘴。 在一个实施例中，等离子体氮化处理发生在沟槽蚀刻之后，但在沟槽填充之前。 在另一个实施例中，等离子体氮化处理发生在沟槽填充之后。 在另一个实施例中，在等离子体氮化处理之前，在蚀刻的衬底的预定有效区域上形成块掩模。 该实施例用于保护PFET器件区域免受等离子体氮化处理，从而提供形成PFET器件区域的装置，其中由鸟嘴形成引起的应力增加了PFET的器件性能。
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