公开(公告)号：US10895792B2

公开(公告)日：2021-01-19

申请号：US16711544

申请日：2019-12-12

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1362 ,  G02F1/1343 ,  H01L29/423

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US09780227B2

公开(公告)日：2017-10-03

申请号：US14944676

申请日：2015-11-18

Applicant: Japan Display Inc.

Inventor： Akihiro Hanada ,  Masayoshi Fuchi ,  Hajime Watakabe ,  Takashi Okada ,  Arichika Ishida

IPC: H01L29/10 ,  H01L29/786 ,  H01L29/423 ,  H01L29/66 ,  H01L21/467

CPC classification number: H01L29/7869 ,  H01L21/467 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78696

Abstract: According to one embodiment, a thin-film transistor and a method of manufacturing the thin-film transistor provided herein achieve enhanced reliability by preventing a disconnection in a gate insulating film at a position corresponding to an end surface of an oxide semiconductor layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. The channel region is placed between the source region and the drain region. The gate insulating film covers the oxide semiconductor layer in a range from at least a part of an upper surface to an end surface continuous with the upper surface of the oxide semiconductor layer. The oxide semiconductor layer is formed so as to have an oxygen concentration that becomes lower from a top side to a bottom side and the end surface is inclined so as to diverge from the top side to the bottom side.

公开(公告)号：US09772536B2

公开(公告)日：2017-09-26

申请号：US15444379

申请日：2017-02-28

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1362 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1343 ,  H01L29/423

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

公开(公告)号：US20170168334A1

公开(公告)日：2017-06-15

申请号：US15444379

申请日：2017-02-28

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.

公开(公告)号：US09666599B2

公开(公告)日：2017-05-30

申请号：US14513653

申请日：2014-10-14

Applicant: Japan Display Inc.

Inventor： Masato Hiramatsu ,  Yasushi Kawata ,  Arichika Ishida

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L27/12

CPC classification number: H01L27/1266 ,  H01L27/1218 ,  H01L27/1222 ,  H01L29/04 ,  H01L29/16 ,  H01L29/66757 ,  H01L29/78684

Abstract: According to one embodiment, a display device includes an underlying insulation layer formed on a surface of a resin layer, and a thin-film transistor formed above the surface of the resin layer via the underlying insulation layer. The underlying insulation layer includes a three-layer multilayer structure of a first silicon oxide film, a silicon nitride film formed above the first silicon oxide film, and a second silicon oxide film formed above the silicon nitride film.

公开(公告)号：US11921392B2

公开(公告)日：2024-03-05

申请号：US17945214

申请日：2022-09-15

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  H01L27/1225 ,  H01L29/78633 ,  H01L29/7869 ,  G02F1/136218 ,  G02F1/13685 ,  G02F2202/10 ,  H01L29/42384

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US11474406B2

公开(公告)日：2022-10-18

申请号：US17126112

申请日：2020-12-18

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1343 ,  H01L29/423

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US10416485B2

公开(公告)日：2019-09-17

申请号：US15826946

申请日：2017-11-30

Applicant: Japan Display Inc.

Inventor： Arichika Ishida ,  Yasushi Kawata

IPC: G02F1/1333 ,  H01L51/00

Abstract: According to one embodiment, a display device includes a first substrate including a first resin substrate having a first thermal expansion coefficient, and a first barrier layer having a second thermal expansion coefficient which is lower than the first thermal expansion coefficient, a second substrate including a second resin substrate having a third thermal expansion coefficient which is equal to the first thermal expansion coefficient, and a second barrier layer having a fourth thermal expansion coefficient which is lower than the third thermal expansion coefficient and is equal to the first thermal expansion coefficient, and a display element located between the first resin substrate and the second resin substrate.

公开(公告)号：US20190067399A1

公开(公告)日：2019-02-28

申请号：US16103047

申请日：2018-08-14

Applicant: Japan Display Inc.

Inventor： Arichika Ishida

IPC: H01L27/32 ,  H01L27/12 ,  G02F1/1345

Abstract: A display device including TFTs in a pixel area and in a peripheral driving area in which the number of through-holes in a TFT circuit is decreased, and the mounting density of the TFTs is improved, so that a high-resolution display can be achieved. The display device includes a display area in which pixels are disposed in a matrix form, and a TFT substrate, on which a peripheral driving circuit is disposed, on the outer side of the display area. The pixels or the peripheral driving circuit includes TFTs (thin film transistors) each of which is formed in such a way that a first gate electrode of each TFT is formed relative to a semiconductor layer with a first gate insulating film therebetween, and a drain electrode and a source electrode of each TFT that are connected to the semiconductor layer are formed at layers different from each other.

公开(公告)号：US20180364509A1

公开(公告)日：2018-12-20

申请号：US16109834

申请日：2018-08-23

Applicant: Japan Display Inc.

Inventor： Yohei Yamaguchi ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  H01L29/423

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136218 ,  G02F2001/13685 ,  G02F2202/10 ,  H01L27/1225 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.