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    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08552497B2

    公开(公告)日：2013-10-08

    申请号：US13290535

    申请日：2011-11-07

    申请人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    发明人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    IPC分类号： H01L29/66

    CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835

    摘要： The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over a substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-type first well contacts the second conductive-type second well over the substrate; and a gate electrode configured to simultaneously cross the first conductive-type first well, the second conductive-type anti-diffusion region, and the second conductive-type second well over the substrate.

    摘要翻译： 半导体器件包括：第一导电型第一阱和第二导电型第二阱，其被配置在衬底上以彼此接触; 第二导电型防扩散区，其配置在所述第一导电型第一阱与所述第二导电型第二阱相接触的界面处; 以及栅电极，其被配置为在所述衬底上同时与所述第一导电型第一阱，所述第二导电型反扩散区和所述第二导电型第二阱交叉。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20110133279A1

    公开(公告)日：2011-06-09

    申请号：US12836503

    申请日：2010-07-14

    申请人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    发明人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    IPC分类号： H01L29/78

    CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835

    摘要： The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over a substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-type first well contacts the second conductive-type second well over the substrate; and a gate electrode configured to simultaneously cross the first conductive-type first well, the second conductive-type anti-diffusion region, and the second conductive-type second well over the substrate.

    摘要翻译： 半导体器件包括：第一导电型第一阱和第二导电型第二阱，其被配置在衬底上以彼此接触; 第二导电型防扩散区，其配置在所述第一导电型第一阱与所述第二导电型第二阱相接触的界面处; 以及栅电极，其被配置为在所述衬底上同时与所述第一导电型第一阱，所述第二导电型反扩散区和所述第二导电型第二阱交叉。

    Semiconductor device
    5.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08546883B2

    公开(公告)日：2013-10-01

    申请号：US12835523

    申请日：2010-07-13

    申请人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    发明人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    IPC分类号： H01L29/66

    CPC分类号： H01L29/7816 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66681

    摘要： A semiconductor device includes a second conductive-type deep well configured above a substrate. The deep well includes an ion implantation region and a diffusion region. A first conductive-type first well is formed in the diffusion region. A gate electrode extends over portions of the ion implantation region and of the diffusion region, and partially overlaps the first well. The ion implantation region has a uniform impurity concentration whereas the impurity concentration of the diffusion region varies from being the highest concentration at the boundary interface between the ion implantation region and the diffusion region to being the lowest at the portion of the diffusion region that is the farthest away from the boundary interface.

    摘要翻译： 半导体器件包括在衬底上方构造的第二导电类型深阱。 深阱包括离子注入区域和扩散区域。 在扩散区域中形成第一导电型第一阱。 栅电极延伸在离子注入区域和扩散区域的部分上，并且部分地与第一阱重叠。 离子注入区域具有均匀的杂质浓度，而扩散区域的杂质浓度从在离子注入区域和扩散区域之间的边界界面处的最高浓度变为在扩散区域的部分处的最低浓度 距离边界界面最远。

    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
    用于制造半导体器件的半导体器件和方法

    公开(公告)号：US20110127612A1

    公开(公告)日：2011-06-02

    申请号：US12882826

    申请日：2010-09-15

    申请人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    发明人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    IPC分类号： H01L27/088 ,  H01L21/336

    CPC分类号： H01L29/66681 ,  H01L21/823412 ,  H01L21/823462 ,  H01L21/823493 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/1045 ,  H01L29/1087 ,  H01L29/66659 ,  H01L29/7835

    摘要： A semiconductor device includes: an active region configured over a substrate to include a first conductive-type first deep well and second conductive-type second deep well forming a junction therebetween. A gate electrode extends across the junction and over a portion of first conductive-type first deep well and a portion of the second conductive-type second deep well. A second conductive-type source region is in the first conductive-type first deep well at one side of the gate electrode whereas a second conductive-type drain region is in the second conductive-type second deep well on another side of the gate electrode. A first conductive-type impurity region is in the first conductive-type first deep well surrounding the second conductive-type source region and extending toward the junction so as to partially overlap with the gate electrode and/or partially overlap with the second conductive-type source region.

    摘要翻译： 半导体器件包括：有源区，被配置在衬底上，以包括第一导电型第一深阱和第二导电型第二深阱，其形成两者之间的接合点。 栅极电极延伸穿过接头并且在第一导电类型的第一深阱的一部分和第二导电类型的第二深阱的一部分上延伸。 第二导电型源极区位于栅电极一侧的第一导电型第一深阱中，而第二导电型漏极区位于栅电极另一侧的第二导电型第二深阱中。 第一导电型杂质区位于围绕第二导电型源极区的第一导电类型的第一深阱中并且朝向结延伸以与栅电极部分重叠和/或部分地与第二导电型 源区。

    Semiconductor device
    9.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08076726B2

    公开(公告)日：2011-12-13

    申请号：US12836503

    申请日：2010-07-14

    申请人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    发明人： Jae-Han Cha ,  Kyung-Ho Lee ,  Sun-Goo Kim ,  Hyung-Suk Choi ,  Ju-Ho Kim ,  Jin-Young Chae ,  In-Taek Oh

    IPC分类号： H01L29/66

    CPC分类号： H01L29/0847 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835

    摘要： The semiconductor device includes: a first conductive-type first well and a second conductive-type second well configured over a substrate to contact each other; a second conductive-type anti-diffusion region configured in an interface where the first conductive-type first well contacts the second conductive-type second well over the substrate; and a gate electrode configured to simultaneously cross the first conductive-type first well, the second conductive-type anti-diffusion region, and the second conductive-type second well over the substrate.

    摘要翻译： 半导体器件包括：第一导电型第一阱和第二导电型第二阱，其被配置在衬底上以彼此接触; 第二导电型防扩散区，其配置在所述第一导电型第一阱与所述第二导电型第二阱相接触的界面处; 以及栅电极，其被配置为在所述衬底上同时与所述第一导电型第一阱，所述第二导电型反扩散区和所述第二导电型第二阱交叉。