公开(公告)号：US4437108A

公开(公告)日：1984-03-13

申请号：US450856

申请日：1982-12-20

申请人： James R. Gardiner ,  Stanley R. Makarewicz ,  Martin Revitz ,  Joseph F. Shepard

发明人： James R. Gardiner ,  Stanley R. Makarewicz ,  Martin Revitz ,  Joseph F. Shepard

IPC分类号： H01L23/532 ,  H01L27/108 ,  H01L29/04 ,  H01L23/48 ,  H01L29/34 ,  H01L29/46

CPC分类号： H01L27/10805 ,  H01L23/53271 ,  H01L2924/0002

摘要： A contact structure in a double polysilicon device is described in which direct shorts between overlying polysilicon conductors due to a "polysilicon void phenomenon" is overcome by patterning an appropriate etch stop between the conductors.

摘要翻译： 描述双重多晶硅器件中的接触结构，其中由于“多晶硅空隙现象”而导致的覆盖多晶硅导体之间的直接短路通过在导体之间构图适当的蚀刻停止来克服。

公开(公告)号：US4249968A

公开(公告)日：1981-02-10

申请号：US974577

申请日：1978-12-29

申请人： James R. Gardiner ,  William A. Pliskin ,  Martin Revitz ,  Joseph F. Shepard

发明人： James R. Gardiner ,  William A. Pliskin ,  Martin Revitz ,  Joseph F. Shepard

IPC分类号： H01L29/78 ,  H01L21/033 ,  H01L21/28 ,  H01L21/336 ,  H01L29/417 ,  H01L29/778 ,  H01L21/20 ,  H01L21/225

CPC分类号： H01L29/66575 ,  H01L21/033 ,  H01L29/7783 ,  Y10S148/018 ,  Y10S148/02 ,  Y10S148/025 ,  Y10S148/122

摘要： A method of making a metal-oxide-semiconductor device is disclosed. A thin silicon dioxide insulating layer is formed on the surface of a planar silicon wafer. A first layer of intrinsic polycrystalline silicon is deposited over the dioxide layer, and a second layer of doped polycrystalline silicon is deposited over the intrinsic layer, thereby forming the gate. Subsequent hot processing steps result in diffusion of a portion of the dopant from the doped polycrystalline layer into and throughout the intrinsic layer so as to dope the latter. A metal contact layer is then deposited onto the gate and in superimposed vertical alignment with respect to the thin silicon dioxide insulating layer. The instrinsic nature of the first polycrystalline layer reduces grain growth and void formation in the polycrystalline silicon and thereby prevents the silicon dioxide from being attacked by hydrofluoric acid seeping through voids in the polycrystalline layer during subsequent processing. The yield for the manufacture of devices having thin oxide gates is substantially improved.

摘要翻译： 公开了制造金属氧化物半导体器件的方法。 在平面硅晶片的表面上形成薄的二氧化硅绝缘层。 本征多晶硅的第一层沉积在二氧化层上，并且第二层掺杂多晶硅沉积在本征层上，由此形成栅极。 随后的热处理步骤导致掺杂剂的一部分从掺杂多晶层扩散到本征层中并遍及本征层，以便掺杂后者。 然后将金属接触层沉积到栅极上并且相对于薄的二氧化硅绝缘层叠加垂直取向。 第一多晶层的本征性质降低了多晶硅中的晶粒生长和空隙形成，从而防止二氧化硅在随后的处理期间被氢氟酸渗透通过多晶层中的空隙。 用于制造具有薄氧化物栅极的器件的产量大大提高。

公开(公告)号：US4354309A

公开(公告)日：1982-10-19

申请号：US187036

申请日：1980-09-12

申请人： James R. Gardiner ,  William A. Pliskin ,  Martin Revitz ,  Joseph F. Shepard

发明人： James R. Gardiner ,  William A. Pliskin ,  Martin Revitz ,  Joseph F. Shepard

IPC分类号： H01L21/033 ,  H01L21/3205 ,  H01L21/3215 ,  H01L21/336 ,  H01L29/778 ,  H01L21/20 ,  H01L21/225

CPC分类号： H01L29/66575 ,  H01L21/033 ,  H01L21/32055 ,  H01L21/32155 ,  H01L29/7783 ,  Y10S438/914

摘要： A method of making a metal-oxide-semiconductor device is disclosed. A thin silicon dioxide insulating layer is formed on the surface of a planar silicon wafer. A first layer of intrinsic polycrystalline silicon is deposited over the dioxide layer, and a second layer of doped polycrystalline silicon is deposited over the intrinsic layer, thereby forming the gate. Subsequent hot processing steps result in diffusion of a portion of the dopant from the doped polycrystalline layer into and throughout the intrinsic layer so as to dope the latter. A metal contact layer is then deposited onto the gate and in superimposed vertical alignment with respect to the thin silicon dioxide insulating layer. The intrinsic nature of the first polycrystalline layer reduces grain growth and void formation in the polycrystalline silicon and thereby prevents the silicon dioxide from being attacked by hydrofluoric acid seeping through voids in the polycrystalline layer during subsequent processing. The yield for the manufacture of devices having thin oxide gates is substantially improved.

摘要翻译： 公开了制造金属氧化物半导体器件的方法。 在平面硅晶片的表面上形成薄的二氧化硅绝缘层。 本征多晶硅的第一层沉积在二氧化层上，并且第二层掺杂多晶硅沉积在本征层上，由此形成栅极。 随后的热处理步骤导致掺杂剂的一部分从掺杂多晶层扩散到本征层中并遍及本征层，以便掺杂后者。 然后将金属接触层沉积到栅极上并且相对于薄的二氧化硅绝缘层叠加垂直取向。 第一多晶层的固有特性减少多晶硅中的晶粒生长和空隙形成，从而防止二氧化硅在随后的处理期间被氢氟酸渗透通过多晶层中的空隙。 用于制造具有薄氧化物栅极的器件的产量大大提高。

公开(公告)号：US4341009A

公开(公告)日：1982-07-27

申请号：US213526

申请日：1980-12-05

申请人： Robert F. Bartholomew ,  Paul L. Garbarino ,  James R. Gardiner ,  Martin Revitz ,  Joseph F. Shepard

发明人： Robert F. Bartholomew ,  Paul L. Garbarino ,  James R. Gardiner ,  Martin Revitz ,  Joseph F. Shepard

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L29/78

CPC分类号： H01L29/78 ,  H01L21/28525

摘要： A buried electrical contact is made to a substrate of monocrystalline silicon through a relatively thin layer of silicon dioxide without causing damage to the relatively thin layer of silicon dioxide. This is accomplished through depositing a thin layer of polycrystalline silicon over the relatively thin layer of silicon dioxide prior to forming the opening in the relatively thin layer of silicon dioxide for the electrical contact to the substrate. After the thin layer of polycrystalline silicon is deposited, an opening is formed therein so that the thin layer of polycrystalline silicon functions as a mask to etch a corresponding opening in the relatively thin layer of silicon dioxide. Then, a layer of polycrystalline silicon is deposited over the exposed surface of the substrate and the thin layer of polycrystalline silicon to form the electrical contact through the opening in the relatively thin layer of silicon dioxide to the substrate.

摘要翻译： 通过相对薄的二氧化硅层对单晶硅的衬底进行掩埋的电接触，而不会对相对薄的二氧化硅层造成损害。 这是通过在相对较薄的二氧化硅层上沉积薄层的多晶硅来实现的，然后在相对较薄的二氧化硅层中形成用于与基板的电接触的开口。 在沉积薄层多晶硅之后，在其中形成开口，使得多晶硅薄层用作掩模以蚀刻相对薄的二氧化硅层中的对应开口。 然后，在衬底的暴露表面和多晶硅薄层上沉积一层多晶硅，以形成通过相对薄的二氧化硅层中的开口到衬底的电接触。