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6 条记录 (耗时 0.027 秒)

    Electrostatic discharge circuit
    1.
    发明授权
    Electrostatic discharge circuit 有权
    静电放电电路

    公开(公告)号：US06327126B1

    公开(公告)日：2001-12-04

    申请号：US09494055

    申请日：2000-01-28

    申请人： James W. Miller ,  Michael G. Khazhinsky ,  Geoffrey B. Hall ,  Jose A. Camarena ,  Joseph Chan ,  Fujio Takeda

    发明人： James W. Miller ,  Michael G. Khazhinsky ,  Geoffrey B. Hall ,  Jose A. Camarena ,  Joseph Chan ,  Fujio Takeda

    IPC分类号： H02H900

    CPC分类号： H01L27/0251

    摘要： A circuit (600) provides Electrostatic Discharge (ESD) protection for internal elements in an integrated circuit during an ESD event. The circuit (600) includes cascoded NMOSFETs (614, 616), with the upper NMOSFET (614) connected to voltage divider circuitry (628). The voltage divider circuitry (628) provides a first bias voltage to the gate of the upper NMOSFET (614) during an ESD event and a second bias voltage during normal operation. Preferably, the first bias voltage is approximately ½ of the drain voltage of the upper NMOSFET (614). Under these bias conditions the cascoded NMOSFETs exhibit a maximum voltage threshold for initiation of parasitic lateral bipolar conduction.

    摘要翻译： 电路（600）在ESD事件期间为集成电路中的内部元件提供静电放电（ESD）保护。 电路（600）包括级联的NMOSFET（614,616），其中上部NMOSFET（614）连接到分压器电路（628）。 分压器电路（628）在ESD事件期间向上NMOSFET（614）的栅极提供第一偏置电压，并在正常操作期间提供第二偏置电压。 优选地，第一偏置电压约为上部NMOSFET（614）的漏极电压的1/2。 在这些偏置条件下，级联的NMOSFET表现出用于启动寄生横向双极传导的最大电压阈值。

    TRANSMISSION GATE CIRCUITRY FOR HIGH VOLTAGE TERMINAL
    2.
    发明申请
    TRANSMISSION GATE CIRCUITRY FOR HIGH VOLTAGE TERMINAL 有权
    用于高压端子的传输门电路

    公开(公告)号：US20110316610A1

    公开(公告)日：2011-12-29

    申请号：US12824991

    申请日：2010-06-28

    申请人： Michael A. Stockinger ,  Jose A. Camarena ,  Wenzhong Zhang

    发明人： Michael A. Stockinger ,  Jose A. Camarena ,  Wenzhong Zhang

    IPC分类号： H03K17/687 ,  H03K17/00

    CPC分类号： H03K17/102

    摘要： A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.

    摘要翻译： 传输门电路包括具有第一开关装置的第一传输门，第一开关装置与第二传输门串联，具有第二开关装置，以及控制电路，其将第一传输门和第二传输门置于导通状态 提供穿过第一传输门和第二传输门的导电路径。 当第一端子的电压高于第一电压电平并且在第一和第二开关装置中的至少一个的安全工作电压区域之外时，第一开关装置保持在其安全工作电压区域内，并且第二开关装置保持在 其安全工作电压面积。

    Integrated circuit having latch-up recovery circuit
    3.
    发明授权
    Integrated circuit having latch-up recovery circuit 有权
    具有闭锁恢复电路的集成电路

    公开(公告)号：US08638135B2

    公开(公告)日：2014-01-28

    申请号：US13272542

    申请日：2011-10-13

    申请人： Jose A. Camarena ,  Dale J. McQuirk ,  Miten H. Nagda

    发明人： Jose A. Camarena ,  Dale J. McQuirk ,  Miten H. Nagda

    IPC分类号： H03L7/00

    CPC分类号： H03K19/00315

    摘要： An integrated circuit includes first and second transistors, a switch, and a power-on reset (POR) circuit. The first transistor has a first current electrode, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode. The switch is for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal. The POR circuit has a latch-up detection circuit coupled to receive the power supply voltage and to a control terminal of the switch. The latch-up detection circuit is for detecting a low voltage condition of the power supply voltage, and in response, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.

    摘要翻译： 集成电路包括第一和第二晶体管，开关和上电复位（POR）电路。 第一晶体管具有第一电流电极，第二电流电极和控制电极。 第二晶体管具有耦合到第一晶体管的第二电流电极的第一电流电极，第二电流电极和控制电极。 该开关用于耦合第一和第二晶体管以响应于断言的偏置控制信号接收电源电压。 POR电路具有闭锁检测电路，其耦合以接收电源电压和开关的控制端。 闩锁检测电路用于检测电源电压的低电压状态，并且作为响应，使偏置控制信号解除分压，以将第一和第二晶体管与电源电压分离。

    Transmission gate circuitry for high voltage terminal
    4.
    发明授权
    Transmission gate circuitry for high voltage terminal 有权
    用于高电压端子的传输门电路

    公开(公告)号：US08228109B2

    公开(公告)日：2012-07-24

    申请号：US12824991

    申请日：2010-06-28

    申请人： Michael A. Stockinger ,  Jose A. Camarena ,  Wenzhong Zhang

    发明人： Michael A. Stockinger ,  Jose A. Camarena ,  Wenzhong Zhang

    IPC分类号： H03K5/08

    CPC分类号： H03K17/102

    摘要： A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.

    摘要翻译： 传输门电路包括具有第一开关装置的第一传输门，第一开关装置与第二传输门串联，具有第二开关装置，以及控制电路，其将第一传输门和第二传输门置于导通状态 提供穿过第一传输门和第二传输门的导电路径。 当第一端子的电压高于第一电压电平并且在第一和第二开关装置中的至少一个的安全工作电压区域之外时，第一开关装置保持在其安全工作电压区域内，并且第二开关装置保持在 其安全工作电压面积。