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    Methods and systems for utilizing intellectual property assets and rights
    2.
    发明授权
    Methods and systems for utilizing intellectual property assets and rights 有权
    利用知识产权资产和权利的方法和制度

    公开(公告)号：US08694419B2

    公开(公告)日：2014-04-08

    申请号：US12398836

    申请日：2009-03-05

    申请人： James E. Malackowski ,  Robert Block ,  Andrew Carter ,  Mark Rubin

    发明人： James E. Malackowski ,  Robert Block ,  Andrew Carter ,  Mark Rubin

    IPC分类号： G06Q40/00

    CPC分类号： G06Q40/06 ,  G06Q99/00

    摘要： A method of utilizing an intellectual property grouping owned by a patent entity to generate income. The method includes acquiring rights in a first intellectual property asset from a seller on behalf of a patent investment entity, providing compensation to the seller in exchange for the first intellectual property asset, granting less than all of the rights in the first intellectual property asset to the seller of the intellectual property asset in exchange for a stream of payments, wherein granting less than all of the rights in the first intellectual property asset creates residual rights in the first intellectual property asset, and utilizing the residual rights in the first intellectual property asset to generate income for the patent investment entity.

    摘要翻译： 利用专利实体拥有的知识产权分类产生收入的方法。 该方法包括代表专利投资实体从卖方获得第一知识产权资产的权利，为卖方交换第一知识产权资产提供赔偿，给予第一知识产权资产的全部权利少于 知识产权资产的卖方换取一笔付款，其中授予的第一知识产权资产的所有权利少于第一知识产权资产的剩余权利，并利用第一知识产权资产的剩余权利 为专利投资实体创造收入。

    Memory array with read reference voltage cells
    3.
    发明授权
    Memory array with read reference voltage cells 有权
    具有读取参考电压单元的存储器阵列

    公开(公告)号：US08098513B2

    公开(公告)日：2012-01-17

    申请号：US13088610

    申请日：2011-04-18

    申请人： Hongyue Liu ,  Yong Lu ,  Andrew Carter ,  Yiran Chen ,  Hai Li

    发明人： Hongyue Liu ,  Yong Lu ,  Andrew Carter ,  Yiran Chen ,  Hai Li

    IPC分类号： G11C11/00

    CPC分类号： G11C7/14 ,  G11C11/1673

    摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.

    摘要翻译： 本公开涉及具有读取参考电压单元的存储器阵列。 特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较 并确定所选存储单元是处于高电阻状态还是低电阻状态。 这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

    MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY
    5.
    发明申请
    MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY 失效
    用于非易失性存储器的MIRRORED-GATE单元

    公开(公告)号：US20100117121A1

    公开(公告)日：2010-05-13

    申请号：US12389817

    申请日：2009-02-20

    申请人： Roger Glenn Rolbiecki ,  Andrew Carter ,  Yong Lu

    发明人： Roger Glenn Rolbiecki ,  Andrew Carter ,  Yong Lu

    IPC分类号： H01L27/085

    CPC分类号： H01L27/0207 ,  H01L27/105 ,  H01L27/11803 ,  H01L27/228 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233

    摘要： A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.

    摘要翻译： 一种存储器，包括至少一个可操作地连接到位线，源极线和字线的存储单元。 存储单元包括具有第一源极触点，第二源极触点和第一源极触点和第二源极触点之间的位接触的基板，电连接第一源极触点和位触点的第一晶体管栅极和第二晶体管 栅极电连接位触点和第二源触点。 字线将第一晶体管栅极电连接到第二晶体管栅极。

    MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS
    6.
    发明申请
    MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS 失效
    存储器阵列，带有读参考电压电池

    公开(公告)号：US20100067282A1

    公开(公告)日：2010-03-18

    申请号：US12212798

    申请日：2008-09-18

    申请人： Hongyue Liu ,  Yong Lu ,  Andrew Carter ,  Yiran Chen ,  Hai Li

    发明人： Hongyue Liu ,  Yong Lu ,  Andrew Carter ,  Yiran Chen ,  Hai Li

    IPC分类号： G11C11/00 ,  G11C7/02 ,  G11C7/22 ,  G11C11/14

    CPC分类号： G11C7/14 ,  G11C11/1673

    摘要： The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.

    摘要翻译： 本公开涉及具有读取参考电压单元的存储器阵列。 特别地，本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列，其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较 并确定所选存储单元是处于高电阻状态还是低电阻状态。 这些存储器阵列特别适用于自旋转移转矩存储单元，并且解决了与生成可靠参考电压有关的许多系统问题。

    METHODS AND SYSTEMS FOR UTILIZING INTELLECTUAL PROPERTY ASSETS AND RIGHTS
    7.
    发明申请
    METHODS AND SYSTEMS FOR UTILIZING INTELLECTUAL PROPERTY ASSETS AND RIGHTS 有权
    利用知识产权资产和权利的方法和制度

    公开(公告)号：US20090234781A1

    公开(公告)日：2009-09-17

    申请号：US12398836

    申请日：2009-03-05

    申请人： James E. Malackowski ,  Robert Block ,  Andrew Carter ,  Mark Rubin

    发明人： James E. Malackowski ,  Robert Block ,  Andrew Carter ,  Mark Rubin

    IPC分类号： G06Q90/00

    CPC分类号： G06Q40/06 ,  G06Q99/00

    摘要： A method of utilizing an intellectual property grouping owned by a patent entity to generate income. The method includes acquiring rights in a first intellectual property asset from a seller on behalf of a patent investment entity, providing compensation to the seller in exchange for the first intellectual property asset, granting less than all of the rights in the first intellectual property asset to the seller of the intellectual property asset in exchange for a stream of payments, wherein granting less than all of the rights in the first intellectual property asset creates residual rights in the first intellectual property asset, and utilizing the residual rights in the first intellectual property asset to generate income for the patent investment entity.

    摘要翻译： 利用专利实体拥有的知识产权分类产生收入的方法。 该方法包括代表专利投资实体从卖方获得第一知识产权资产的权利，为卖方交换第一知识产权资产提供赔偿，给予第一知识产权资产的全部权利少于 知识产权资产的卖方换取一笔付款，其中授予的第一知识产权资产的所有权利少于第一知识产权资产的剩余权利，并利用第一知识产权资产的剩余权利 为专利投资实体创造收入。

    Solid state light source for emitting light over a broad spectral band
    9.
    发明授权
    Solid state light source for emitting light over a broad spectral band 失效
    用于在宽光谱带上发光的固态光源

    公开(公告)号：US5045896A

    公开(公告)日：1991-09-03

    申请号：US326555

    申请日：1989-03-21

    申请人： Richard M. Ash ,  Andrew Carter

    发明人： Richard M. Ash ,  Andrew Carter

    IPC分类号： H01L33/00

    CPC分类号： H01L33/0062 ,  H01L33/0025

    摘要： A solid state light source comprising a monolithic light emitter diode structure having a graded bandgap active region 8 the thickness of which is graded between two materials 9, 11, the said materials having differing center wavelengths of light emission, such that the source is capable of emitting light at wavelengths L1, L2 spaced over the whole spectral width between the wavelengths exhibited by the said two materials. This can enable the light source to be used in optical fibre devices where it can provide on alternative to the filament lamp source and thus give an increased reliability in use.

    摘要翻译： 一种固态光源，包括具有梯度带隙有源区8的单片发光二极管结构，该层状有源区8的厚度分布在两个材料9,11之间，所述材料具有不同的发光中心波长，使得源能够 发射在所述两种材料所呈现的波长之间的整个光谱宽度上隔开的波长L1，L2处的光。 这可以使得光源可以用在光纤设备中，其可以提供替代白炽灯源，从而在使用中提供更高的可靠性。

    MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY
    10.
    发明申请
    MIRRORED-GATE CELL FOR NON-VOLATILE MEMORY 有权
    用于非易失性存储器的MIRRORED-GATE单元

    公开(公告)号：US20120037875A1

    公开(公告)日：2012-02-16

    申请号：US13280392

    申请日：2011-10-25

    申请人： Roger Glenn Rolbiecki ,  Andrew Carter ,  Yong Lu

    发明人： Roger Glenn Rolbiecki ,  Andrew Carter ,  Yong Lu

    IPC分类号： H01L45/00

    CPC分类号： H01L27/0207 ,  H01L27/105 ,  H01L27/11803 ,  H01L27/228 ,  H01L27/2436 ,  H01L45/04 ,  H01L45/06 ,  H01L45/085 ,  H01L45/1233

    摘要： A memory comprising at least one memory cell operationally connected to a bit line, a source line and a word line. The memory cell comprises a substrate having a first source contact, a second source contact, and a bit contact between the first source contact and the second source contact, a first transistor gate electrically connecting the first source contact and the bit contact and a second transistor gate electrically connecting the bit contact and the second source contact. The word line electrically connects the first transistor gate to the second transistor gate.

    摘要翻译： 一种存储器，包括至少一个可操作地连接到位线，源极线和字线的存储单元。 存储单元包括具有第一源极触点，第二源极触点和第一源极触点和第二源极触点之间的位接触的基板，电连接第一源极触点和位触点的第一晶体管栅极和第二晶体管 栅极电连接位触点和第二源触点。 字线将第一晶体管栅极电连接到第二晶体管栅极。