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1.发明申请Seal assemblies for use with drooped spoilers and other control surfaces on aircraft 有权用于飞机上的下垂扰流板和其他控制面的密封组件公开(公告)号：US20070252040A1
公开(公告)日：2007-11-01
申请号：US11220446
申请日：2005-09-07
IPC分类号： B64C3/00
CPC分类号： B64C7/00 , B64C9/18 , B64C2009/143 , Y02T50/32 , Y10S277/916
摘要： Aerodynamic seals for use with control surfaces on aircraft are described herein. In one embodiment, a seal assembly for use with an aircraft includes a first seal member and a second seal member. The first seal member has a first proximal portion configured to be attached to a fixed airfoil portion of the aircraft, and a first distal portion configured to extend outwardly from the fixed airfoil portion toward a movable control surface. The second seal member has a second proximal portion configured to be attached to the movable control surface, and a second distal portion configured to extend outwardly from the control surface toward the fixed airfoil portion. In this embodiment, the second distal portion is further configured to movably contact the first distal portion to at least partially seal the gap between the fixed airfoil portion and the movable control surface as the control surface moves relative to the fixed airfoil portion.
摘要翻译： 这里描述了用于与飞机上的控制表面一起使用的气动密封件。 在一个实施例中，与飞行器一起使用的密封组件包括第一密封构件和第二密封构件。 第一密封构件具有构造成附接到飞机的固定翼型部分的第一近端部分，以及构造成从固定翼型部分朝向可移动控制表面向外延伸的第一远端部分。 第二密封构件具有构造成附接到可移动控制表面的第二近端部分，以及被配置为从控制表面朝向固定翼型部分向外延伸的第二远端部分。 在该实施例中，第二远端部分进一步构造成当控制表面相对于固定翼型部分移动时，可移动地接触第一远端部分以至少部分地密封固定翼型部分和可移动控制表面之间的间隙。
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公开(公告)号：US20190333143A1
公开(公告)日：2019-10-31
申请号：US15966351
申请日：2018-04-30
申请人： Darren Williams
发明人： Darren Williams
摘要： Small and medium sized enterprises are often in need of short-term financing, such as via invoice financing. However, peer-to-peer invoice financing platforms are vulnerable to fraud, and in particular duplication in the selling of invoices. The present invention allows the ledger of prior art blockchains to be decoupled to improve operational efficiency.
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公开(公告)号：USD614875S1
公开(公告)日：2010-05-04
申请号：US29330595
申请日：2009-01-09
申请人： Sean Johnson , Darren Williams
设计人： Sean Johnson , Darren Williams
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4.发明申请Apparatus And Method For Acceleration of Security Applications Through Pre-Filtering 审中-公开通过预过滤加速安全应用的装置和方法公开(公告)号：US20070039051A1
公开(公告)日：2007-02-15
申请号：US11465634
申请日：2006-08-18
申请人： Peter Duthie , Peter Bisroev , Teewoon Tan , Darren Williams , Robert Barrie , Stephen Gould
发明人： Peter Duthie , Peter Bisroev , Teewoon Tan , Darren Williams , Robert Barrie , Stephen Gould
CPC分类号： G06F21/56
摘要： A first security processing stage performs a first multitude of tasks and a second security processing stage performs a second multitude of tasks. The first and second multitude of tasks may include common tasks. The first security processing stage is a prefilter to the second security processing stage. The input data received as a data stream is first processed by the first security processing stage, which in response, generates one or more first processed data streams. The first processed data streams may be further processed by the second security processing stage or may bypass the second security processing stage. The first security processing stage operates at a speed greater than the speed of the second security processing stage.
摘要翻译： 第一安全处理阶段执行第一多个任务，第二安全处理阶段执行第二大量任务。 第一和第二个任务可能包括常见任务。 第一安全处理阶段是到第二安全处理阶段的预过滤器。 作为数据流接收的输入数据首先由第一安全处理阶段进行处理，第一安全处理阶段响应地生成一个或多个第一处理数据流。 第一处理数据流可以由第二安全处理级进一步处理，或可以绕过第二安全处理级。 第一安全处理级以大于第二安全处理级的速度的速度操作。
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公开(公告)号：US20060221658A1
公开(公告)日：2006-10-05
申请号：US11422529
申请日：2006-06-06
IPC分类号： G11C15/00
CPC分类号： G06F21/554 , G06F7/02 , G06F21/567 , G06F2207/025 , G11C15/00 , H04L63/0227 , H04L63/12 , H04L63/1441
摘要： A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
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6.发明申请APPARATUS AND METHOD FOR MEMORY EFFICIENT, PROGRAMMABLE, PATTERN MATCHING FINITE STATE MACHINE HARDWARE 失效存储器效率，可编程，图形匹配有限状态机硬件的装置和方法公开(公告)号：US20060120137A1
公开(公告)日：2006-06-08
申请号：US10799367
申请日：2004-03-12
IPC分类号： G11C11/24
CPC分类号： G06F21/554 , G06F7/02 , G06F21/567 , G06F2207/025 , G11C15/00 , H04L63/0227 , H04L63/12 , H04L63/1441
摘要： A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
摘要翻译： 可编程有限状态机（FSM）部分地包括第一和第二存储器，以及耦合到每个存储器的选择电路。 当接收到表示k位输入符号和m位当前状态的（k + m）位字时，第一存储器提供存储在其中的一个或多个匹配转换规则。 选择电路选择最具体的提供的规则。 过渡规则以一般性的排序顺序存储在第一存储器中。 第二个存储器接收所选择的转移规则并提供FSM的下一个状态。 第一存储器可以是三进制内容可寻址存储器，并且第二存储器可以是静态随机存取存储器。 内容可寻址存储器和静态随机存储器的内容由最小化表示下一状态转换功能所需的术语数量的算法确定。
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公开(公告)号：US08163791B2
公开(公告)日：2012-04-24
申请号：US12528680
申请日：2007-02-26
申请人： In-Jae Shin , Myung-ryul Lee , Darren Williams
发明人： In-Jae Shin , Myung-ryul Lee , Darren Williams
IPC分类号： A61K31/415 , C07D233/64
CPC分类号： C07D233/64
摘要： The present invention relates to a pharmaceutical composition comprising compound for induction of apoptosis, a method for inducing cancer cell apoptosis, a method to suppress lymphocyte activation, a method to improve intracellular trafficking of misfolded mutants and a screening method to identify additional compounds useful for inducing apoptosis, and more specifically, it relates to pharmaceutical compositions comprising imidazole derivatives as active gradients for induction of apoptosis to treat various diseases including cancers and immune-related diseases, the method of inducing apoptosis by treating cancer cells with the pharmaceutical composition, the method of inactivating human lymphocytes by treating lymphocytes with the pharmaceutical composition, the method of improving intracellular trafficking of misfolded mutants by treating cells containing the mutants with the pharmaceutical composition, and the screening method for identifying additional compound useful for inducing apoptosis, wherein cells are incubated with the said pharmaceutical composition and detected.
摘要翻译： 本发明涉及包含用于诱导凋亡的化合物的药物组合物，诱导癌细胞凋亡的方法，抑制淋巴细胞活化的方法，改善错误折叠的突变体的细胞内运输的方法以及鉴定用于诱导的另外的化合物的筛选方法 细胞凋亡，更具体地说，涉及包含咪唑衍生物作为诱导凋亡的活性梯度以治疗各种疾病（包括癌症和免疫相关疾病）的药物组合物，通过用药物组合物治疗癌细胞诱导凋亡的方法， 通过用药物组合物治疗淋巴细胞来灭活人淋巴细胞，通过用药物组合物处理含有突变体的细胞来改善错误折叠的突变体的细胞内运输的方法，以及鉴定用于诱导的另外的化合物的筛选方法 g细胞凋亡，其中将细胞与所述药物组合物孵育并检测。
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8.发明授权Apparatus and method for generating state transition rules for memory efficient programmable pattern matching finite state machine hardware 有权用于产生存储器有效可编程模式匹配有限状态机硬件的状态转换规则的装置和方法公开(公告)号：US07219319B2
公开(公告)日：2007-05-15
申请号：US11422520
申请日：2006-06-06
IPC分类号： G06F17/50
CPC分类号： H04L63/12
摘要： A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
摘要翻译： 可编程有限状态机（FSM）部分地包括第一和第二存储器，以及耦合到每个存储器的选择电路。 当接收到表示k位输入符号和m位当前状态的（k + m）位字时，第一存储器提供存储在其中的一个或多个匹配转换规则。 选择电路选择最具体的提供的规则。 过渡规则以一般性的排序顺序存储在第一存储器中。 第二个存储器接收所选择的转移规则并提供FSM的下一个状态。 第一存储器可以是三进制内容可寻址存储器，并且第二存储器可以是静态随机存取存储器。 内容可寻址存储器和静态随机存储器的内容由最小化表示下一状态转换功能所需的术语数量的算法确定。
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9.发明申请Apparatus and method for accelerating intrusion detection and prevention systems using pre-filtering 审中-公开使用预过滤加速入侵检测和预防系统的装置和方法公开(公告)号：US20060191008A1
公开(公告)日：2006-08-24
申请号：US11291530
申请日：2005-11-30
申请人： Amila Fernando , Anthony Place , Simon Ratner , Teewoon Tan , Darren Williams , Robert Barrie , Stephen Gould
发明人： Amila Fernando , Anthony Place , Simon Ratner , Teewoon Tan , Darren Williams , Robert Barrie , Stephen Gould
IPC分类号： G06F12/14
CPC分类号： G06F21/554 , G06F21/56 , G06F21/562 , G06F21/564 , G06Q10/107 , H04L51/12 , H04L63/1416 , H04L63/1441 , H04L63/145
摘要： An accelerated network intrusion detection and prevention system includes, in part, first, second and third processing stages. The first processing stage receives incoming packets and generates, in response, first and second processed data streams using a first set of rules. The first processing stage optionally detects whether the received packets are suspected of attacking the network and places the received data packets in the first processed data stream. The second processing stage receives the first processed data stream and generates, in response, a third processed data stream using a second set of rules. The second processing stage optionally classifies the first processed data stream, that is suspected of launching a network attack, as either attacks or benign network traffic. A third processing stage receives and processes the second and third processed data streams.
摘要翻译： 加速网络入侵检测和预防系统部分包括第一，第二和第三处理阶段。 第一处理阶段接收传入的分组，并且响应地使用第一组规则生成第一和第二处理数据流。 第一处理阶段可选地检测所接收的分组是否被怀疑攻击网络，并将接收到的数据分组放置在第一处理数据流中。 第二处理阶段接收第一处理数据流，并且响应地使用第二组规则生成第三处理数据流。 第二处理阶段可选地将被怀疑发起网络攻击的第一处理数据流分类为攻击或良性网络流量。 第三处理阶段接收并处理第二和第三处理数据流。
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10.发明授权Apparatus and method for memory efficient, programmable, pattern matching finite state machine hardware 失效用于存储器高效，可编程，模式匹配的有限状态机硬件的装置和方法公开(公告)号：US07082044B2
公开(公告)日：2006-07-25
申请号：US10799367
申请日：2004-03-12
IPC分类号： G11C13/00
CPC分类号： G06F21/554 , G06F7/02 , G06F21/567 , G06F2207/025 , G11C15/00 , H04L63/0227 , H04L63/12 , H04L63/1441
摘要： A programmable finite state machine (FSM) includes, in part, first and second memories, and a selection circuit coupled to each of the memories. Upon receiving a (k+m)-bit word representative of the k-bit input symbol and the m-bit current state, the first memory supplies one ore more matching transition rules stored therein. The selection circuit selects the most specific of the supplied rules. The transition rules are stored in the first memory in a ranking order of generality. The second memory receives the selected transition rule and supplies the next state of the FSM. The first memory may be a ternary content addressable memory and the second memory may be a static random access memory. The contents of both the content addressable memory and the static random memory is determined by an algorithm which minimizes the number of terms required to represent the next-state transition functions.
摘要翻译： 可编程有限状态机（FSM）部分地包括第一和第二存储器，以及耦合到每个存储器的选择电路。 当接收到表示k位输入符号和m位当前状态的（k + m）位字时，第一存储器提供存储在其中的一个或多个匹配转换规则。 选择电路选择最具体的提供的规则。 过渡规则以一般性的排序顺序存储在第一存储器中。 第二个存储器接收所选择的转移规则并提供FSM的下一个状态。 第一存储器可以是三进制内容可寻址存储器，并且第二存储器可以是静态随机存取存储器。 内容可寻址存储器和静态随机存储器的内容由最小化表示下一状态转换功能所需的术语数量的算法确定。
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