Sigma-delta digital FM demodulator
    1.
    发明授权
    Sigma-delta digital FM demodulator 失效
    Sigma-delta数字FM解调器

    公开(公告)号:US5345188A

    公开(公告)日:1994-09-06

    申请号:US92381

    申请日:1993-07-14

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: H03D3/00 H03D3/18

    摘要: Digital frequency demodulation is accomplished by monitoring similar transitions in an FM radio signal to determine frequency. Time intervals between similar transitions in the FM signal are established by selecting anticipated transition times and accumulating error values relative to actual transition times. Accumulated error values provide a basis for further selecting anticipated transition times in such manner that a reported sequence of anticipated transition times provides a basis for inferring signal frequency. In one illustrated embodiment, the chosen transition times are positive transitions in the FM signal and the anticipated times of transition are taken from a set of two time periods, an early transition and a late transition relative to a valid transition window. By reporting the selected anticipation times by associated values in a digital bit stream, frequency may be inferred by computing a ratio of given digital values in the bit stream relative to the total number of samples in the bit stream.

    摘要翻译: 通过监视FM无线电信号中的类似转换来确定频率来实现数字频率解调。 通过选择预期的转换时间并相对于实际的转换时间积累误差值来建立FM信号中相似转换之间的时间间隔。 累积误差值提供了进一步选择预期转换时间的基础,使得所报告的预期转换时间序列提供了推断信号频率的基础。 在一个示出的实施例中,所选择的转换时间是FM信号中的正转换,并且转换的预期时间取自于一组两个时间段,即相对于有效转换窗口的早期转换和后期转换。 通过在数字比特流中通过相关联的值报告所选择的预期时间,可以通过计算比特流中给定的数字值相对于比特流中的总样本的比率来推断频率。

    Method and apparatus for accurate time maintenance and display
    2.
    发明授权
    Method and apparatus for accurate time maintenance and display 失效
    方法和设备,用于准确的时间维护和显示

    公开(公告)号:US5448533A

    公开(公告)日:1995-09-05

    申请号:US179835

    申请日:1994-01-07

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: G04G5/00 G04G7/02 G04C11/02

    CPC分类号: G04R20/24

    摘要: A highly accurate time keeping device and time keeping system are disclosed. Time of day information is periodically sent to a wristwatch via radio signal. The time of day as displayed by the watch is updated periodically using the radio signal data and maintained between such periodic updates according to an algorithm of the present invention. The disclosed time keeping system thereby maintains a plurality of time keeping devices in substantially exact synchronization over an extended period.

    摘要翻译: 公开了一种高精度的时间保持装置和计时系统。 时间信息通过无线电信号周期性地发送到手表。 根据本发明的算法,使用无线电信号数据周期性地更新手表显示的时间,并在这种周期性更新之间进行维护。 所公开的时间保持系统由此在多个时间段内保持基本精确同步的多个计时装置。

    Analyzer for frequency modulated signals
    3.
    发明授权
    Analyzer for frequency modulated signals 失效
    频率调制信号分析仪

    公开(公告)号:US5745777A

    公开(公告)日:1998-04-28

    申请号:US695254

    申请日:1996-08-09

    IPC分类号: H04H20/12 H04L12/26 G06F15/00

    摘要: An FM signal or protocol analyzer (PA) system: The PA system is capable of analyzing the broadcast signal at many levels, from analysis of the physical RF link to comprehensive analysis of the subcarrier messaging. The PA system is built on a computer including special hardware and software. The custom hardware comprises at least one precision RF receiver and signal processing circuitry. The custom software includes data acquisition, data analysis and data presentation software. As a feature of the present invention, a PA system is designed to be "user friendly." As such, it operates in a windowing environment and makes extensive use of graphical displays. The PA system can operate in a networking environment so the receiver and signal processing circuitry can be physically distant from the user's display and keyboard, in another computer connected to the network. The look and feel of the PA system being operated over a network is similar to the look and feel of a PA system with all its components being local, except for any performance limitations that are imposed by network throughput.

    摘要翻译: FM信号或协议分析仪(PA)系统:PA系统能够从物理射频链路的分析到子载波消息的综合分析,分析多个级别的广播信号。 PA系统构建在包括特殊硬件和软件在内的计算机上。 定制硬件包括至少一个精密RF接收器和信号处理电路。 定制软件包括数据采集,数据分析和数据呈现软件。 作为本发明的特征,PA系统被设计为“用户友好”。 因此,它在窗口环境中运行,并广泛使用图形显示。 PA系统可以在网络环境中操作,使得接收机和信号处理电路在物理上远离用户的显示器和键盘,在连接到网络的另一计算机中。 通过网络运行的PA系统的外观和感觉与其所有组件都是本地的PA系统的外观和感觉相似,除了由网络吞吐量施加的任何性能限制。

    Paging device including password accessed stored cryptographic keys
    4.
    发明授权
    Paging device including password accessed stored cryptographic keys 失效
    寻呼设备包括密码访问存储的加密密钥

    公开(公告)号:US5483595A

    公开(公告)日:1996-01-09

    申请号:US410640

    申请日:1995-03-21

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: H04L9/00 H04K1/00

    摘要: A paging device includes a cryptographic function and a password accessed cryptographic key look-up table associating each stored key with a password. When an cryptographic message is collected by the paging device, the user can select a relatively long cryptographic key by entering a relatively shorter password. The paging device then applies a cryptographic function to a received message using a selected relatively long cryptographic key, the selection being a function of user entry of a relatively short password. Overall, paging messages in transit, i.e., while broadcast by radio signal, enjoy a high level of security by encryption with a relatively long cryptographic key by a message source. As accessed by the user, however, the cryptographic messages are reviewed in readable form by use of a relatively short password designating a relatively long stored cryptographic key.

    摘要翻译: 寻呼设备包括将每个存储的密钥与密码相关联的密码功能和密码访问密码密钥查找表。 当通过寻呼装置收集加密消息时,用户可以通过输入相对较短的密码来选择较长的加密密钥。 然后,寻呼装置使用所选择的相对长的加密密钥对接收到的消息应用加密功能,该选择是用户输入相对较短密码的功能。 总的来说,传输中的寻呼消息,即在通过无线电信号广播的同时,通过消息源使用相对长的加密密钥进行加密,享有高水平的安全性。 然而,如用户所访问的那样,通过使用指定相对长的存储的加密密钥的相对较短的密码来以可读的形式检查加密消息。

    Method and apparatus for accurate time maintenance and display
    5.
    发明授权
    Method and apparatus for accurate time maintenance and display 失效
    方法和设备,用于准确的时间维护和显示

    公开(公告)号:US5469411A

    公开(公告)日:1995-11-21

    申请号:US236534

    申请日:1994-05-02

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: G04G5/00 G04G7/02 G04C11/00

    CPC分类号: G04R20/20

    摘要: A time keeping and display system, device, and method are shown and illustrated including radio signal broadcast of a time of day reference signal. Remote time keeping devices intermittently collect the time of day reference. Each remote device automatically captures a current state of a time keeping counter when capturing the time of day reference. The captured state of the time keeping counter is later compared to the received time of day reference to calculate an update relative to the time of day counter. The calculated update may be a calculated error later applied as an offset to the counter, or may be a sum of the received time of day and an elapsed time, later loaded into the counter. When the remote device has no pending higher priority tasks, a brief fixed execution time procedure modifies the time keeping counter as a function of the calculated update. Because the process of modifying the time keeping counter is brief, no perceivable discontinuity in device operation, i.e., time display updates or response to user interface activity, occurs while the processing element of the device is dedicated entirely, i.e., interrupts disabled, to the task of modifying the content of the time keeping counter.

    摘要翻译: 示出并示出了时间和显示系统,装置和方法,包括时间参考信号的无线电信号广播。 远程计时器间歇地收集时间参考。 当捕获时间参考时,每个远程设备自动捕获计时器的当前状态。 时间计数器的捕获状态稍后与接收的日间参考时间进行比较,以计算相对于时间计数器的更新。 所计算的更新可以是稍后应用于计数器的偏移量的计算错误,或者可以是接收到的时间和经过的时间之和,并且后来加载到计数器中。 当远程设备没有待处理的较高优先级任务时,简单的固定执行时间过程会根据计算的更新修改计时器。 由于修改计时器的过程很简单,在设备的处理元件完全专用(即中断被禁用)的情况下,不会发生设备操作的可察觉的不连续性,即时间显示更新或对用户界面活动的响应。 修改计时器内容的任务。

    Phase locked loop with limited lock time
    6.
    发明授权
    Phase locked loop with limited lock time 失效
    锁相环锁定时间有限

    公开(公告)号:US5986513A

    公开(公告)日:1999-11-16

    申请号:US563767

    申请日:1990-08-06

    IPC分类号: H03L7/10 H03L7/00

    CPC分类号: H03L7/10

    摘要: A phase locked loop circuit employing a single phase detector provides limited maximum lock time by avoiding hang-up. The circuit first establishes a gross indication of phase relation sufficient to establish a direction of phase shift away from the unstable equilibrium point. The phase is then shifted by a predetermined value to establish a bounded phase relation exclusive of the unstable equilibrium point and inclusive of the stable equilibrium point. Conventional phase locking then provides the desired frequency and phase relation, but without potential for hang-up.

    摘要翻译: 采用单相检测器的锁相环电路通过避免挂起来提供有限的最大锁定时间。 电路首先建立足够的相位关系的总体指示,以建立远离不稳定平衡点的相移方向。 然后将相位移动预定值以建立排除不稳定平衡点并包括稳定平衡点的有界相位关系。 传统的相位锁定则提供所需的频率和相位关系,但不具有挂起的潜力。

    Loop antenna with reduced electrical field sensitivity
    7.
    发明授权
    Loop antenna with reduced electrical field sensitivity 失效
    具有降低电场灵敏度的环形天线

    公开(公告)号:US5826178A

    公开(公告)日:1998-10-20

    申请号:US592908

    申请日:1996-01-29

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: H01Q7/00 H04B1/18

    CPC分类号: H01Q7/005 H04B1/18

    摘要: A small, high Q loop antenna configured on a printed circuit board as a planar structure receives a radio signal and shields its interior planar area against interfering electric field energy while concentrating therein radio signal magnetic flux. A magnetic pickup loop, coplanar to the antenna loop and magnetically coupled thereto, receives the radio signal power by virtue of its magnetic coupling to the loop antenna. The magnetic pickup loop couples to a receiving device and delivers the radio signal thereto. Illustrated embodiments include loop antennas tunable to a desired resonant frequency.

    摘要翻译: 构造在印刷电路板上的小型高Q环形天线作为平面结构接收无线电信号并屏蔽其内部平面区域以抵抗干扰电场能量,同时在其中集中无线电信号磁通量。 与天线环路共面并与其磁耦合的磁拾波回路通过其与环形天线的磁耦合来接收无线电信号功率。 磁拾取环路耦合到接收设备并将无线电信号传送到其上。 示例性实施例包括可调谐到期望谐振频率的环形天线。

    Data bit synchronization
    8.
    发明授权
    Data bit synchronization 失效
    数据位同步

    公开(公告)号:US5280501A

    公开(公告)日:1994-01-18

    申请号:US594583

    申请日:1990-10-09

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: H04L7/02 H04L27/06

    CPC分类号: H04L7/0054

    摘要: Bit synchronization is achieved by identifying potential bit sample points and assigning corresponding weight values as a function of signal noise vulnerability. The greater the possibility of error due to signal noise, the smaller the assigned weight value. The bit sample points associated with the largest accumulated weight value are taken as the appropriate data sample points for extracting information from the data signal. For a duobinary signal, zero crossings are identified as potential bit sample points and assigned a weight value corresponding to signal slope thereat. The number of possible bit sample points associated with each actual bit sample point is limited to a finite set by phase locking the carrier signal to the data rate.

    摘要翻译: 通过识别潜在位采样点并分配相应的权重值作为信号噪声脆弱性的函数来实现位同步。 由信号噪声引起的误差可能性越大,分配的重量值越小。 将与最大累积权重值相关联的位采样点作为从数据信号提取信息的适当数据采样点。 对于双二进制信号,过零点被识别为潜在位采样点,并分配与其信号斜率对应的权重值。 与每个实际位采样点相关联的可能位采样点的数量通过将载波信号锁相到数据速率来限制到有限集合。

    Low power programmable ripple counter
    9.
    发明授权
    Low power programmable ripple counter 失效
    低功耗可编程纹波计数器

    公开(公告)号:US6026140A

    公开(公告)日:2000-02-15

    申请号:US63957

    申请日:1998-04-21

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    IPC分类号: H03K23/58 H03K23/66 G06M3/00

    CPC分类号: H03K23/662 H03K23/58

    摘要: A ripple counter becomes programmable by use of intervening circuitry selectively inhibiting state transitions according to an initial programming step. The illustrated embodiment of a programmable ripple counter includes a forward chain of count registers operating generally in the fashion of a ripple counter, but selectively inhibited by an intervening control signal originating from a reverse chain of control registers. By selectively controlling the number of state transitions inhibited and by selectively controlling the number of registers participating in the counting operation, a low power general purpose programmable ripple counter results.

    摘要翻译: 根据初始编程步骤,纹波计数器可通过使用选择性地阻止状态转换的中间电路来编程。 可编程纹波计数器的所示实施例包括通常以纹波计数器的方式操作但是由来自控制寄存器的反向链的中间控制信号选择性地禁止的计数寄存器的前向链。 通过选择性地控制禁止的状态转换的数量,并且通过选择性地控制参与计数操作的寄存器的数量,得到低功率通用可编程纹波计数器。

    Gatable level-pulling circuit
    10.
    发明授权
    Gatable level-pulling circuit 失效
    Gatable电梯牵引电路

    公开(公告)号:US5594362A

    公开(公告)日:1997-01-14

    申请号:US543248

    申请日:1995-10-13

    申请人: Jeffrey R. Owen

    发明人: Jeffrey R. Owen

    CPC分类号: H03K19/1731 H03K17/302

    摘要: Integrated circuit components automatically establish or disable a level-pulling condition relative to a given input IC pin as a function of detected signal activity at such IC pin, A logic signal responsive to signal activity at the IC pin drives the gate of a field effect transistor (FET) to dynamically establish or disable level-pulling function at the IC pin. Alternative embodiments include a flop-flop register and an OR gate driving the gate of the FET.

    摘要翻译: 集成电路组件自动建立或禁用相对于给定输入IC引脚的电平拉动状态作为在该IC引脚处检测到的信号活动的函数。响应IC引脚上的信号活动的逻辑信号驱动场效应晶体管的栅极 (FET)来动态地建立或禁止IC引脚上的电平拉动功能。 替代实施例包括一个触发器寄存器和一个驱动FET栅极的OR门。