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10 条记录 (耗时 0.036 秒)

    Apparatus for determining the instantaneous average number of instructions processed
    2.
    发明授权
    Apparatus for determining the instantaneous average number of instructions processed 失效
    用于确定处理的指令的瞬时平均数的装置

    公开(公告)号：US06175814B1

    公开(公告)日：2001-01-16

    申请号：US08977438

    申请日：1997-11-26

    申请人： George Z. Chrysos ,  Jeffrey Dean ,  James E. Hicks, Jr. ,  Carl A. Waldspurger ,  William E. Weihl

    发明人： George Z. Chrysos ,  Jeffrey Dean ,  James E. Hicks, Jr. ,  Carl A. Waldspurger ,  William E. Weihl

    IPC分类号： G06F900

    CPC分类号： G06F11/3466 ,  G06F11/3452 ,  G06F2201/86 ,  G06F2201/88 ,  G06F2201/885

    摘要： An apparatus is provided for determining an average number of instructions entering a stage of a processor pipeline of a computer system during a clock cycle of a processor clock. The number of instructions entering a particular stage of the pipeline are stored in a queue during each of a predetermined number (N) of clock cycles. The total number of instructions processed over the last P clock cycles is computed, where P is less than or equal to N. The total number of instructions processed is divided by the last P processor cycles to yield the instantaneous average number of instructions processed for each processor cycle. This average number of instructions processed is communicated to software.

    摘要翻译： 提供了一种用于在处理器时钟的时钟周期期间确定进入计算机系统的处理器流水线的阶段的平均数量的装置。 在预定数量（N）个时钟周期的每一个期间，进入流水线的特定级的指令的数量被存储在队列中。 计算在最后P个时钟周期中处理的指令总数，其中P小于或等于N。处理的指令的总数除以最后的P个处理器周期，以产生每个处理的指令的瞬时平均数 处理器周期。 处理的平均指令数量传达给软件。

    Apparatus for spatial and temporal sampling in a computer memory system
    6.
    发明授权
    Apparatus for spatial and temporal sampling in a computer memory system 失效
    用于在计算机存储器系统中进行空间和时间采样的装置

    公开(公告)号：US06202127B1

    公开(公告)日：2001-03-13

    申请号：US08979822

    申请日：1997-11-26

    申请人： Jeffrey A. Dean ,  James E. Hicks, Jr. ,  Carl A. Waldspurger ,  William E. Weihl

    发明人： Jeffrey A. Dean ,  James E. Hicks, Jr. ,  Carl A. Waldspurger ,  William E. Weihl

    IPC分类号： G06F1200

    CPC分类号： G06F11/3466 ,  G06F11/348 ,  G06F2201/81 ,  G06F2201/815 ,  G06F2201/86 ,  G06F2201/88 ,  G06F2201/885

    摘要： An apparatus for sampling states of a computer system having a hierarchical memory arranged at a plurality of levels, the hierarchical memory storing data at addresses. The apparatus includes a selector for selecting memory transactions based on first state and transaction information. The memory transactions are to be processed by the hierarchical memory. A trigger activates the selector based on second state and transaction information. A sampler stores states of the computer system that are identified with the selected instructions while processing the selected memory transactions in the hierarchical memory.

    摘要翻译： 一种用于对具有以多个级别排列的分级存储器的计算机系统的状态进行采样的装置，所述分层存储器在地址处存储数据。 该装置包括：基于第一状态和交易信息选择存储器交易的选择器。 存储器事务将由分层存储器处理。 触发器基于第二状态和交易信息激活选择器。 采样器存储在分层存储器中处理所选择的存储器事务时用所选指令标识的计算机系统的状态。

    Method for providing virtual memory to physical memory page mapping in a computer operating system that randomly samples state information
    7.
    发明授权
    Method for providing virtual memory to physical memory page mapping in a computer operating system that randomly samples state information 失效
    将虚拟存储器提供给随机抽取状态信息的计算机操作系统中的物理存储器页面映射的方法

    公开(公告)号：US06237073B1

    公开(公告)日：2001-05-22

    申请号：US08979034

    申请日：1997-11-26

    申请人： Jeffrey Dean ,  James E. Hicks, Jr. ,  William E. Weihl

    发明人： Jeffrey Dean ,  James E. Hicks, Jr. ,  William E. Weihl

    IPC分类号： G06F1200

    CPC分类号： G06F12/10 ,  G06F11/3466 ,  G06F2201/885

    摘要： A method is provided for guiding virtual-to-physical mapping policies in a computer system including a processor and a memory. State information is randomly sampled from selected memory references in a stream of memory references issued by the processor to the memory. Cache hit/miss status, translation-look-aside buffer hit/miss status, and effective virtual and physical memory addresses of the sampled memory references are recorded in a profile record. The recorded information is aggregated by virtual memory address, and a new virtual-to-physical mapping is choosen to reduce cache and translation-look-aside buffer miss rates.

    摘要翻译： 提供了一种用于在包括处理器和存储器的计算机系统中引导虚拟到物理映射策略的方法。 在由处理器向存储器发出的存储器引用流中，从选择的存储器引用中随机抽取状态信息。 缓存命中/未命中状态，翻译后备缓冲区命中/未命中状态以及采样存储器引用的有效虚拟和物理存储器地址被记录在简档记录中。 记录的信息通过虚拟存储器地址进行聚合，并且选择新的虚拟到物理映射以减少高速缓存和翻译后备缓冲区未命中率。

    Method and apparatus for verification of ingestion
    8.
    发明授权
    Method and apparatus for verification of ingestion 失效
    食入验证方法及装置

    公开(公告)号：US07427266B2

    公开(公告)日：2008-09-23

    申请号：US10737229

    申请日：2003-12-15

    申请人： Steven M. Ayer ,  Donald R. Denning, Jr. ,  Frank C. Bomba ,  Andrew D. Christian ,  James E. Hicks, Jr.

    发明人： Steven M. Ayer ,  Donald R. Denning, Jr. ,  Frank C. Bomba ,  Andrew D. Christian ,  James E. Hicks, Jr.

    IPC分类号： A61B5/07 ,  A61B5/103 ,  A61B5/117

    CPC分类号： A61B5/42 ,  A61B5/062 ,  A61B5/073 ,  A61B5/4833 ,  A61B90/90 ,  A61B90/98

    摘要： A method and apparatus keeps track of ingestible objects (such as pills or food items) ingested by humans or animals. The objects are supplied with radio frequency identification (RFID) tags encoding data describing the objects. The humans or animals ingesting the objects are equipped with RFID sensors for detecting, decoding, and archiving the data encoded in the tags. A user may scan the body of the human or animal subject with a sensor to determine if a tagged object has been ingested. The tags may be covered with substances or contain elements that dissolve upon entering a digestive system. This allows detection of ingestion and also allows the RFID tag encoding to change in the course of digestion.

    摘要翻译： 一种方法和装置跟踪人或动物摄入的可摄取物体（如药丸或食物）。 这些对象被提供有编码描述对象的数据的射频识别（RFID）标签。 摄入物体的人体或动物装备有用于检测，解码和归档标签中编码的数据的RFID传感器。 用户可以用传感器扫描人或动物受试者的身体，以确定是否已经被标记的物体被摄取。 标签可能被物质覆盖或含有在进入消化系统时溶解的元素。 这允许检测摄取，并且还允许RFID标签编码在消化过程中改变。