Arrangement consisting of a program-controlled unit and a power chip connected to it
    1.
    发明授权
    Arrangement consisting of a program-controlled unit and a power chip connected to it 有权
    由程序控制单元和与其连接的电源芯片组成

    公开(公告)号:US07337343B2

    公开(公告)日:2008-02-26

    申请号:US10727101

    申请日:2003-12-02

    IPC分类号: G06F1/00 G05B24/00

    摘要: An arrangement including a program-controlled unit and a power chip, the power chip connected to drive electric loads in accordance with load control data, and the program-controlled unit transmitting the load control data and power chip control data, and the power chip transmitting to the program-controlled unit diagnostic data. The program-controlled unit, by transmitting corresponding control data to the power chip, can input the behavior of the output drivers of the power chip and/or configure protective mechanisms present in the power chip and/or input to the power chip the format of the diagnostic data to be output and/or input to the power chip when it has to output what diagnostic data and/or input to the power chip which load is to be controlled by which load control data section, and/or input to the power chip whether the load control data contains redundant data suitable for detecting transmission errors.

    摘要翻译: 一种包括程序控制单元和功率芯片的布置,根据负载控制数据连接驱动电力负载的电源芯片,以及发送负载控制数据和电源芯片控制数据的程序控制单元,以及功率芯片发送 到程序控制单元的诊断数据。 程序控制单元通过将相应的控制数据发送到功率芯片,可以输入功率芯片的输出驱动器的行为和/或配置电源芯片中存在的保护机制和/或输入到电源芯片的格式 要输出和/或输入到功率芯片的诊断数据,当它必须输出哪些诊断数据和/或输入到功率芯片的负载将由哪个负载控制数据部分控制和/或输入到功率 芯片负载控制数据是否包含适合于检测传输错误的冗余数据。

    ARRANGEMENT COMPRISING A FIRST SEMICONDUCTOR CHIP AND A SECOND SEMICONDUCTOR CHIP CONNECTED THERETO
    3.
    发明申请
    ARRANGEMENT COMPRISING A FIRST SEMICONDUCTOR CHIP AND A SECOND SEMICONDUCTOR CHIP CONNECTED THERETO 有权
    包含第一半导体芯片和连接的第二个半导体芯片的布置

    公开(公告)号:US20120117283A1

    公开(公告)日:2012-05-10

    申请号:US13355130

    申请日:2012-01-20

    IPC分类号: G06F3/00

    摘要: A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.

    摘要翻译: 一种用于半导体芯片的数据通信方法,包括从第一半导体芯片向一个或多个第二半导体芯片发送负载控制数据,导频数据和传输时钟信号,所述第二半导体芯片分别耦合到一个或多个电负载,基于 由负载控制数据定义的定时,通过将传输时钟信号除以由导频数据规定的分频因子得出传输速率,并以传输速率从一个或多个第二半导体芯片向第一半导体芯片发送诊断数据。

    Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto
    4.
    发明授权
    Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto 有权
    包括第一半导体芯片和与其连接的第二半导体芯片的布置

    公开(公告)号:US08112563B2

    公开(公告)日:2012-02-07

    申请号:US10727102

    申请日:2003-12-02

    IPC分类号: G06F13/12 G06F13/38

    摘要: An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.

    摘要翻译: 一种包括连接到其上的第一半导体芯片和第二半导体芯片的布置,其中第二半导体芯片另外连接到电负载并且基于由负载控制数据规定的定时驱动这些电负载,并且其中 第一半导体芯片向第二半导体芯片发送上述负载控制数据和控制第二半导体芯片的导频数据,第二半导体芯片向第一半导体芯片发送表示第二半导体芯片中的状态的诊断数据, 发生。 诊断数据经由第一传输信道发送,负载控制数据和导频数据经由第二传输信道发送。

    Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto
    5.
    发明授权
    Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto 有权
    包括第一半导体芯片和与其连接的第二半导体芯片的布置

    公开(公告)号:US07738588B2

    公开(公告)日:2010-06-15

    申请号:US10727108

    申请日:2003-12-02

    IPC分类号: H04L27/00

    摘要: An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The first semiconductor chip transmits appropriate pilot data in order to prescribe to the second semiconductor chip what transmission rate is to be used by the second semiconductor chip to transmit the diagnostic data to the first semiconductor chip.

    摘要翻译: 一种包括连接到其上的第一半导体芯片和第二半导体芯片的布置,其中第二半导体芯片另外连接到电负载并且基于由负载控制数据规定的定时驱动这些电负载,并且其中 第一半导体芯片向第二半导体芯片发送上述负载控制数据和控制第二半导体芯片的导频数据,第二半导体芯片向第一半导体芯片发送表示第二半导体芯片中的状态的诊断数据, 发生。 第一半导体芯片发送适当的导频数据,以便向第二半导体芯片规定第二半导体芯片将使用什么传输速率将诊断数据发送到第一半导体芯片。

    Timer for A/D converter
    6.
    发明授权
    Timer for A/D converter 有权
    A / D转换器定时器

    公开(公告)号:US6147635A

    公开(公告)日:2000-11-14

    申请号:US307999

    申请日:1999-05-10

    IPC分类号: G06F3/05 H03M1/12

    CPC分类号: H03M1/1225

    摘要: A timer for an A/D converter generates a request signal for A/D conversion by the A/D converter. In addition to the usual request signal, the timer produces a further signal which is used, before one cycle of the timer has elapsed, to block the A/D converter for low-priority requests from other requesting devices and to reserve it for the timer. In this manner, the signal to be converted from the timer can be sampled at reproducible, equidistant instants without having to wait for the end of the last conversion.

    摘要翻译: 用于A / D转换器的定时器通过A / D转换器产生用于A / D转换的请求信号。 除了通常的请求信号之外,定时器还产生另一个信号,该信号在定时器的一个周期过去之前被使用,以阻止来自其他请求设备的低优先级请求的A / D转换器,并将其保留给定时器 。 以这种方式,从定时器转换的信号可以在可再现的等距时刻进行采样,而不必等待最后一次转换的结束。

    Data transmission device
    7.
    发明授权
    Data transmission device 有权
    数据传输设备

    公开(公告)号:US07350015B2

    公开(公告)日:2008-03-25

    申请号:US10285046

    申请日:2002-10-31

    IPC分类号: G06F13/36

    CPC分类号: G06F13/28 G06F13/4027

    摘要: A data transmission device forwards data that have been received from a first device, intended for a second device, to the second device. The data transmission device is distinguished in that it has connections for connecting at least two data buses and can output data received by a first data bus either onto the same data bus or onto another data bus immediately or later. Therefore, the data transmission device can be used selectively, alternately or simultaneously as a DMA controller and a bus bridge. It also has additional functions unrelated to DMA controllers and bus bridges.

    摘要翻译: 数据传输设备将已经从第一设备接收的用于第二设备的数据转发到第二设备。 数据传输设备的区别在于它具有用于连接至少两个数据总线的连接,并且可以立即或稍后地将由第一数据总线接收的数据输出到同一数据总线上或另一数据总线上。 因此,数据传输设备可以选择性地,交替地或同时地用作DMA控制器和总线桥。 它还具有与DMA控制器和总线桥接无关的附加功能。

    Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto
    8.
    发明授权
    Arrangement comprising a first semiconductor chip and a second semiconductor chip connected thereto 有权
    包括第一半导体芯片和与其连接的第二半导体芯片的布置

    公开(公告)号:US08380899B2

    公开(公告)日:2013-02-19

    申请号:US13355130

    申请日:2012-01-20

    IPC分类号: G06F13/12 G06F13/38

    摘要: A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.

    摘要翻译: 一种用于半导体芯片的数据通信方法,包括从第一半导体芯片向一个或多个第二半导体芯片发送负载控制数据,导频数据和传输时钟信号,所述第二半导体芯片分别耦合到一个或多个电负载,基于 由负载控制数据定义的定时,通过将传输时钟信号除以由导频数据规定的分频因子得出传输速率,并以传输速率从一个或多个第二半导体芯片向第一半导体芯片发送诊断数据。

    Electrical control device with configurable control modules
    10.
    发明授权
    Electrical control device with configurable control modules 失效
    具有可配置控制模块的电气控制装置

    公开(公告)号:US06289400B1

    公开(公告)日:2001-09-11

    申请号:US09060787

    申请日:1998-04-15

    IPC分类号: G06F1300

    CPC分类号: G05B19/0423 G05B19/052

    摘要: A multifunctional electrical control device for producing control signals for driving electrical devices. The control device produces the control signals with a large number of control modules which can be configured with respect to their interaction. This means that the control device is of simple construction, can be used in a variety of ways and can be in each case optimally adapted to the prevailing conditions with a minimum of effort.

    摘要翻译: 一种用于产生用于驱动电气装置的控制信号的多功能电气控制装置。 控制装置产生具有大量控制模块的控制信号,可以根据它们的相互作用进行配置。 这意味着控制装置结构简单,可以以各种方式使用,并且可以在每种情况下以最小的努力最佳地适应现行条件。