摘要:
A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.
摘要:
An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.
摘要:
An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The first semiconductor chip transmits appropriate pilot data in order to prescribe to the second semiconductor chip what transmission rate is to be used by the second semiconductor chip to transmit the diagnostic data to the first semiconductor chip.
摘要:
A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.
摘要:
An arrangement including a program-controlled unit and a power chip, the power chip connected to drive electric loads in accordance with load control data, and the program-controlled unit transmitting the load control data and power chip control data, and the power chip transmitting to the program-controlled unit diagnostic data. The program-controlled unit, by transmitting corresponding control data to the power chip, can input the behavior of the output drivers of the power chip and/or configure protective mechanisms present in the power chip and/or input to the power chip the format of the diagnostic data to be output and/or input to the power chip when it has to output what diagnostic data and/or input to the power chip which load is to be controlled by which load control data section, and/or input to the power chip whether the load control data contains redundant data suitable for detecting transmission errors.
摘要:
The disclosed A/D conversion system is designed to signal the beginning or the impending beginning of an A/D conversion and/or to request the implementation of an A/D conversion from another A/D converter. As a result, it is possible to have a plurality of A/D converters work absolutely time-synchronously with minimal outlay.
摘要:
A timer for an A/D converter generates a request signal for A/D conversion by the A/D converter. In addition to the usual request signal, the timer produces a further signal which is used, before one cycle of the timer has elapsed, to block the A/D converter for low-priority requests from other requesting devices and to reserve it for the timer. In this manner, the signal to be converted from the timer can be sampled at reproducible, equidistant instants without having to wait for the end of the last conversion.
摘要:
A data transmission device forwards data that have been received from a first device, intended for a second device, to the second device. The data transmission device is distinguished in that it has connections for connecting at least two data buses and can output data received by a first data bus either onto the same data bus or onto another data bus immediately or later. Therefore, the data transmission device can be used selectively, alternately or simultaneously as a DMA controller and a bus bridge. It also has additional functions unrelated to DMA controllers and bus bridges.
摘要:
The interface between a memory device and a device requesting data from the memory device ensures that the data requested are read from the memory device and forwarded to the device requesting the data. The interface described is distinguished by the fact that if, following the reading of data from the memory device, there are no further requests from the device requesting data, it modifies the address previously used to read data from the memory device and arranges for the data stored at the address in the memory device to be read, and/or in that, at a predefined time following the initiation of the read operation, it accepts the data output by the memory device and/or starts the next memory access.
摘要:
In accordance with an aspect of the application, there is provided a system for testing, including a first chip, a second chip, and first and second connections. The first connection is configured to couple a first pin of the first chip to a first pin of the second chip, and to transmit an initial signal from the first chip to the second chip. The second connection is configured to couple a second pin of the first chip to a second pin of the second chip to return the signal as a returned signal to the first chip. The first chip comprises comparison circuitry configured to compare the returned signal with the initial signal.