公开(公告)号：US20080203680A1

公开(公告)日：2008-08-28

申请号：US12036453

申请日：2008-02-25

申请人： Heinrich Peter Rohm ,  Eugen Hangleiter

发明人： Heinrich Peter Rohm ,  Eugen Hangleiter

IPC分类号： B23B31/20

CPC分类号： B23B31/261 ,  B23B31/006 ,  B23B2231/0224 ,  B23B2265/32 ,  Y10T279/1008 ,  Y10T279/1045 ,  Y10T279/17743

摘要： A tool or workpiece has a mounting collar open axially outward, formed with a radially inwardly directed angled flank, and having a radial outer surface of noncircular cross-sectional shape. A chuck has a body formed with an axially forwardly open socket shaped to receive the collar with the axes generally coaxial and having an inner surface of a noncircular cross-sectional shape substantially complementary to the shape of the collar outer surface. A plurality of jaws axially fixed in the socket have radially movable ends engageable inside the collar and each formed with a radially inwardly and axially outwardly directed face. A cam having a face centered on the axis is engageable with the jaw front ends such that axial rearward shifting of the cam presses the jaw front ends outward and thereby presses the jaw faces against the collar flank to lock the collar in the socket.

摘要翻译： 工具或工件具有轴向向外开口的安装环，形成有径向向内定向的成角度的侧面，并且具有非圆形横截面形状的径向外表面。 卡盘具有主体，该主体形成有轴向向前打开的插座，其形状适于容纳所述轴环，所述轴线大致同轴并且具有与所述轴环外表面的形状基本上互补的非圆形横截面形状的内表面。 轴向固定在插座中的多个钳口具有可接合在套环内部并且各自形成有径向向内和轴向向外指向的面的径向可移动端。 具有以轴为中心的表面的凸轮可与钳口前端接合，使得凸轮的轴向向后移动将钳口前端向外压迫，从而将钳口面压靠在胎圈侧面上，以将套环锁定在插座中。

公开(公告)号：US07337343B2

公开(公告)日：2008-02-26

申请号：US10727101

申请日：2003-12-02

申请人： Jens Barrenscheen ,  Peter Rohm

发明人： Jens Barrenscheen ,  Peter Rohm

IPC分类号： G06F1/00 ,  G05B24/00

CPC分类号： G05B19/0428 ,  G05B19/058 ,  G05B2219/25257 ,  G05B2219/33327

摘要： An arrangement including a program-controlled unit and a power chip, the power chip connected to drive electric loads in accordance with load control data, and the program-controlled unit transmitting the load control data and power chip control data, and the power chip transmitting to the program-controlled unit diagnostic data. The program-controlled unit, by transmitting corresponding control data to the power chip, can input the behavior of the output drivers of the power chip and/or configure protective mechanisms present in the power chip and/or input to the power chip the format of the diagnostic data to be output and/or input to the power chip when it has to output what diagnostic data and/or input to the power chip which load is to be controlled by which load control data section, and/or input to the power chip whether the load control data contains redundant data suitable for detecting transmission errors.

摘要翻译： 一种包括程序控制单元和功率芯片的布置，根据负载控制数据连接驱动电力负载的电源芯片，以及发送负载控制数据和电源芯片控制数据的程序控制单元，以及功率芯片发送 到程序控制单元的诊断数据。 程序控制单元通过将相应的控制数据发送到功率芯片，可以输入功率芯片的输出驱动器的行为和/或配置电源芯片中存在的保护机制和/或输入到电源芯片的格式 要输出和/或输入到功率芯片的诊断数据，当它必须输出哪些诊断数据和/或输入到功率芯片的负载将由哪个负载控制数据部分控制和/或输入到功率 芯片负载控制数据是否包含适合于检测传输错误的冗余数据。

公开(公告)号：US20050108488A1

公开(公告)日：2005-05-19

申请号：US10490230

申请日：2002-08-30

申请人： Peter Rohm ,  Angela Rohm

发明人： Peter Rohm ,  Angela Rohm

IPC分类号： G06F12/14 ,  G06F21/52 ,  G06F21/71 ,  G06F21/79

CPC分类号： G06F21/71 ,  G05B2219/24168 ,  G06F12/1458 ,  G06F21/52 ,  G06F21/79

摘要： When access to proprietary data or sensitive information stored in a memory device of a programmable unit is attempted, a check is carried out to determine whether the requested access has been or could have been initiated by someone who is not authorized to do so, and in that the memory device outputs requested data, and/or stores data which is supplied to it only when the check shows that it can be assumed that the relevant access has not been initiated or could not have been initiated by someone who is not authorized to do so. Access is controlled, for example, by identifying the source of the requested access, or by associating the requested access with the execution of a secure command.

摘要翻译： 当尝试访问存储在可编程单元的存储器设备中的专有数据或敏感信息时，执行检查以确定所请求的访问是否已被或已经由未被授权的人启动，并且在 存储器装置输出所请求的数据，和/或存储仅当检查表明可以假定相关访问尚未被启动或不被无权执行的人发起时提供给它的数据 所以。 访问被控制，例如，通过识别所请求的访问的源，或通过将请求的访问与执行安全命令相关联来进行控制。

公开(公告)号：US06788235B1

公开(公告)日：2004-09-07

申请号：US09581590

申请日：2000-07-26

申请人： Jens Barrenscheen ,  Gunther Fenzl ,  Peter Rohm ,  Dietmar Koenig ,  Dirk Elkemeier

发明人： Jens Barrenscheen ,  Gunther Fenzl ,  Peter Rohm ,  Dietmar Koenig ,  Dirk Elkemeier

IPC分类号： H03M112

CPC分类号： H03M1/12 ,  G06F3/05

摘要： The disclosed A/D conversion system is designed to signal the beginning or the impending beginning of an A/D conversion and/or to request the implementation of an A/D conversion from another A/D converter. As a result, it is possible to have a plurality of A/D converters work absolutely time-synchronously with minimal outlay.

摘要翻译： 所公开的A / D转换系统被设计为用信号通知A / D转换的开始或即将开始和/或要求从另一个A / D转换器实现A / D转换。 结果，可以使多个A / D转换器以最小的花费绝对时间同步工作。

公开(公告)号：US6112217A

公开(公告)日：2000-08-29

申请号：US122056

申请日：1998-07-24

申请人： Peter Rohm ,  Patrick Leteinturier

发明人： Peter Rohm ,  Patrick Leteinturier

IPC分类号： G06F1/06 ,  G06F7/62 ,  G06F7/68 ,  G06F7/52

CPC分类号： G06F7/62 ,  G06F7/68

摘要： A method and an apparatus for generating clock signals is described, by which a period of time can be subdivided into a desired number of essentially equal-length segments. The method and the apparatus are distinguished in that the clock signals are generated based on the outcomes of a repeated subtraction of a first value from a second value. The first value depends on the number of segments into which the period of time to be subdivided is to be subdivided, and the second value depends on the duration of the period of time to be subdivided.

摘要翻译： 描述了用于产生时钟信号的方法和装置，通过该方法和装置可以将一段时间细分为期望数量的基本相等长度的段。 该方法和装置的区别在于，基于从第二值重复减去第一值的结果生成时钟信号。 第一个值取决于细分时间段的段数，第二个值取决于待细分的时间段的持续时间。

公开(公告)号：US6032178A

公开(公告)日：2000-02-29

申请号：US5696

申请日：1998-01-12

申请人： Tommaso Bacigalupo ,  Michael Erdmann ,  Peter Rohm

发明人： Tommaso Bacigalupo ,  Michael Erdmann ,  Peter Rohm

IPC分类号： G06F13/14 ,  G06F13/36 ,  G06F13/364 ,  G06F13/42 ,  G06F13/00

CPC分类号： G06F13/364

摘要： The invention relates to a method and an arrangement for operating a bus system having at least one master unit and at least one slave unit, having a bus and a bus control unit for the bus arbitration and for controlling the data transfer. The data transmission is split into a request data transfer and a response data transfer, and, in the time between the request data transfer and the response data transfer, the bus is cleared for the data transmissions of other master units in a first data transmission configuration, or the bus is blocked between the request data transfer and the response data transfer, in a second data transmission configuration and slave units. In the case of a response transfer, the master and slave are changed round.

摘要翻译： 本发明涉及一种用于操作总线系统的方法和装置，所述总线系统具有至少一个主单元和至少一个从单元，具有用于总线仲裁和用于控制数据传输的总线和总线控制单元。 数据传输被分成请求数据传送和响应数据传送，并且在请求数据传送和响应数据传送之间的时间内，总线被清除用于在第一数据传输配置中的其它主单元的数据传输 或者在第二数据传输配置和从属单元中在请求数据传送和响应数据传送之间阻塞总线。 在响应传输的情况下，主和从设备被改变。

公开(公告)号：US20120117283A1

公开(公告)日：2012-05-10

申请号：US13355130

申请日：2012-01-20

申请人： Jens Barrenscheen ,  Peter Rohm ,  Angela Rohm ,  Hannes Estl ,  Axel Aue ,  Jens Graf ,  Herman Roozenbeek

发明人： Jens Barrenscheen ,  Peter Rohm ,  Angela Rohm ,  Hannes Estl ,  Axel Aue ,  Jens Graf ,  Herman Roozenbeek

IPC分类号： G06F3/00

CPC分类号： G05B19/0428 ,  G05B9/02 ,  G05B2219/25012

摘要： A data communication method for semiconductor chips including transmitting load control data, pilot data and a transmission clock signal from a first semiconductor chip to one or more second semiconductor chips that are each coupled to one or more electrical loads, driving the electrical loads based on a timing defined by the load control data, deriving a transmission rate by dividing the transmission clock signal by a division factor prescribed by the pilot data, and transmitting diagnostic data at the transmission rate from the one or more second semiconductor chips to the first semiconductor chip.

摘要翻译： 一种用于半导体芯片的数据通信方法，包括从第一半导体芯片向一个或多个第二半导体芯片发送负载控制数据，导频数据和传输时钟信号，所述第二半导体芯片分别耦合到一个或多个电负载，基于 由负载控制数据定义的定时，通过将传输时钟信号除以由导频数据规定的分频因子得出传输速率，并以传输速率从一个或多个第二半导体芯片向第一半导体芯片发送诊断数据。

公开(公告)号：US08112563B2

公开(公告)日：2012-02-07

申请号：US10727102

申请日：2003-12-02

申请人： Jens Barrenscheen ,  Peter Rohm ,  Angela Rohm, legal representative ,  Hannes Estl ,  Axel Aue ,  Jens Graf ,  Herman Roozenbeek

发明人： Jens Barrenscheen ,  Peter Rohm ,  Hannes Estl ,  Axel Aue ,  Jens Graf ,  Herman Roozenbeek

IPC分类号： G06F13/12 ,  G06F13/38

CPC分类号： G05B19/0428 ,  G05B9/02 ,  G05B2219/25012

摘要： An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.

摘要翻译： 一种包括连接到其上的第一半导体芯片和第二半导体芯片的布置，其中第二半导体芯片另外连接到电负载并且基于由负载控制数据规定的定时驱动这些电负载，并且其中 第一半导体芯片向第二半导体芯片发送上述负载控制数据和控制第二半导体芯片的导频数据，第二半导体芯片向第一半导体芯片发送表示第二半导体芯片中的状态的诊断数据， 发生。 诊断数据经由第一传输信道发送，负载控制数据和导频数据经由第二传输信道发送。

公开(公告)号：US07738588B2

公开(公告)日：2010-06-15

申请号：US10727108

申请日：2003-12-02

申请人： Jens Barrenscheen ,  Peter Rohm ,  Angela Rohm, legal representative ,  Axel Aue ,  Jens Graf ,  Herman Roozenbeek

发明人： Jens Barrenscheen ,  Peter Rohm ,  Axel Aue ,  Jens Graf ,  Herman Roozenbeek

IPC分类号： H04L27/00

CPC分类号： H04L1/24 ,  G05B2219/2202 ,  G05B2219/2214 ,  G05B2219/24044 ,  G05B2219/24065

摘要： An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The first semiconductor chip transmits appropriate pilot data in order to prescribe to the second semiconductor chip what transmission rate is to be used by the second semiconductor chip to transmit the diagnostic data to the first semiconductor chip.

摘要翻译： 一种包括连接到其上的第一半导体芯片和第二半导体芯片的布置，其中第二半导体芯片另外连接到电负载并且基于由负载控制数据规定的定时驱动这些电负载，并且其中 第一半导体芯片向第二半导体芯片发送上述负载控制数据和控制第二半导体芯片的导频数据，第二半导体芯片向第一半导体芯片发送表示第二半导体芯片中的状态的诊断数据， 发生。 第一半导体芯片发送适当的导频数据，以便向第二半导体芯片规定第二半导体芯片将使用什么传输速率将诊断数据发送到第一半导体芯片。

公开(公告)号：US6147635A

公开(公告)日：2000-11-14

申请号：US307999

申请日：1999-05-10

申请人： Jens Barrenscheen ,  Peter Rohm ,  Gunther Fenzl

发明人： Jens Barrenscheen ,  Peter Rohm ,  Gunther Fenzl

IPC分类号： G06F3/05 ,  H03M1/12

CPC分类号： H03M1/1225

摘要： A timer for an A/D converter generates a request signal for A/D conversion by the A/D converter. In addition to the usual request signal, the timer produces a further signal which is used, before one cycle of the timer has elapsed, to block the A/D converter for low-priority requests from other requesting devices and to reserve it for the timer. In this manner, the signal to be converted from the timer can be sampled at reproducible, equidistant instants without having to wait for the end of the last conversion.

摘要翻译： 用于A / D转换器的定时器通过A / D转换器产生用于A / D转换的请求信号。 除了通常的请求信号之外，定时器还产生另一个信号，该信号在定时器的一个周期过去之前被使用，以阻止来自其他请求设备的低优先级请求的A / D转换器，并将其保留给定时器 。 以这种方式，从定时器转换的信号可以在可再现的等距时刻进行采样，而不必等待最后一次转换的结束。