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    Method of forming a phase change material layer pattern and method of manufacturing a phase change memory device
    1.
    发明授权
    Method of forming a phase change material layer pattern and method of manufacturing a phase change memory device 有权
    形成相变材料层图案的方法和制造相变存储器件的方法

    公开(公告)号：US08865558B2

    公开(公告)日：2014-10-21

    申请号：US13543905

    申请日：2012-07-09

    申请人： Jeong-Hee Park ,  Soon-Oh Park ,  Jung-Hwan Park ,  Jin-Ho Oh

    发明人： Jeong-Hee Park ,  Soon-Oh Park ,  Jung-Hwan Park ,  Jin-Ho Oh

    IPC分类号： H01L47/00 ,  H01L45/00

    CPC分类号： H01L45/06 ,  H01L45/141 ,  H01L45/1683

    摘要： A method of forming a phase change material layer pattern includes forming a phase change material layer partially filling an opening through an insulating interlayer. A plasma treatment process is performed on the phase change material layer to remove an oxide layer on a surface of the phase change material layer. A heat treatment process is performed on the phase change material layer to remove a void or a seam in the phase change material layer, sufficiently filling the opening.

    摘要翻译： 形成相变材料层图案的方法包括：通过绝缘中间层形成部分填充开口的相变材料层。 在相变材料层上进行等离子体处理工艺以去除相变材料层的表面上的氧化物层。 在相变材料层上进行热处理工艺以去除相变材料层中的空隙或接缝，充分填充开口。

    Short pulse rejection circuit and method thereof
    5.
    发明申请
    Short pulse rejection circuit and method thereof 有权
    短脉冲抑制电路及其方法

    公开(公告)号：US20090189644A1

    公开(公告)日：2009-07-30

    申请号：US12289855

    申请日：2008-11-06

    申请人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

    发明人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

    IPC分类号： G01R29/02

    CPC分类号： H04L7/033 ,  H03K5/1252 ,  H03K5/1534 ,  H04L7/0083

    摘要： A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter circuit may perform a low pass filtering on the edge detection signal to generate a first signal. The comparison circuit may compare the first signal with a reference voltage. The gating circuit may gate the delayed input signal based on an output signal of the comparison circuit. Therefore, the short pulse rejection circuit may have a sufficient setup/hold time margin of a flip-flop, and may sample an input signal even when a state of the input signal does not change during an initial operation.

    摘要翻译： 短脉冲抑制电路可以包括边缘检测器，滤波器电路，比较电路和门控电路。 边缘检测器可以延迟输入信号以产生延迟的输入信号，并且检测输入信号的边沿以产生边缘检测信号。 滤波器电路可以对边缘检测信号执行低通滤波以产生第一信号。 比较电路可以将第一信号与参考电压进行比较。 门控电路可以基于比较电路的输出信号对延迟的输入信号进行门控。 因此，短脉冲抑制电路可以具有触发器的足够的建立/保持时间裕度，并且即使当在初始操作期间输入信号的状态不改变时，也可以采样输入信号。

    Short pulse rejection circuit and method thereof
    6.
    发明授权
    Short pulse rejection circuit and method thereof 有权
    短脉冲抑制电路及其方法

    公开(公告)号：US07719321B2

    公开(公告)日：2010-05-18

    申请号：US12289855

    申请日：2008-11-06

    申请人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

    发明人： Cheon-Oh Lee ,  Nam-Hyun Kim ,  Ki-Hong Kim ,  Jong-Seok Kim ,  Jin-Ho Oh

    IPC分类号： H03K9/08

    CPC分类号： H04L7/033 ,  H03K5/1252 ,  H03K5/1534 ,  H04L7/0083

    摘要： A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter circuit may perform a low pass filtering on the edge detection signal to generate a first signal. The comparison circuit may compare the first signal with a reference voltage. The gating circuit may gate the delayed input signal based on an output signal of the comparison circuit. Therefore, the short pulse rejection circuit may have a sufficient setup/hold time margin of a flip-flop, and may sample an input signal even when a state of the input signal does not change during an initial operation.

    摘要翻译： 短脉冲抑制电路可以包括边缘检测器，滤波器电路，比较电路和门控电路。 边缘检测器可以延迟输入信号以产生延迟的输入信号，并且检测输入信号的边沿以产生边缘检测信号。 滤波器电路可以对边缘检测信号执行低通滤波以产生第一信号。 比较电路可以将第一信号与参考电压进行比较。 门控电路可以基于比较电路的输出信号对延迟的输入信号进行门控。 因此，短脉冲抑制电路可以具有触发器的足够的建立/保持时间裕度，并且即使在初始操作期间输入信号的状态没有改变时，也可以采样输入信号。