公开(公告)号：US6098282A

公开(公告)日：2000-08-08

申请号：US34072

申请日：1998-03-03

申请人： Jerome Albert Frankeny ,  Richard Francis Frankeny ,  Terry Frederick Hayden ,  Ronald Lann Imken ,  Janet Louise Rice

发明人： Jerome Albert Frankeny ,  Richard Francis Frankeny ,  Terry Frederick Hayden ,  Ronald Lann Imken ,  Janet Louise Rice

IPC分类号： H05K1/16 ,  H05K3/46 ,  H05K3/42

CPC分类号： H05K3/462 ,  H05K1/162 ,  H05K3/4641 ,  H01L2224/81385 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09718 ,  H05K2203/0307 ,  H05K3/4623 ,  Y10T29/435 ,  Y10T29/49165 ,  Y10T29/49169

摘要： Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric, and has selectively deposited a metallic layer for interconnecting the capacitor and forming vias. The ends of the vias are thereafter subject to dendritic growth and joining metallurgy to provide stackable interconnection capability. A multilayer composite laminar stackable circuit board structure is created using, as appropriate, layers having metallic cores and layers having capacitively configured cores. The multilayer laminar stackable circuit board provides direct vertical connection between surface mounted electronic components and the power, signal and capacitive decoupling layers of the composite board through the dendrites and joining metallurgy of the via and plug formations.

摘要翻译： 用于制造精细间距图案多层印刷电路板的方法和装置，其包括提供功率分配，信号分配和电容去耦的层叠堆叠板层。 在一个方面，本发明涉及通过金属芯开始制造板层，图案化芯，选择性地将芯包围在电介质中，选择性地沉积金属以形成通孔，插塞和信号线，以及用连接冶金形成树突 在通孔和插头上，以从板层的平面上方或下方提供可堆叠连接。 在另一方面，本发明涉及使用溶胶 - 凝胶法在金属片上形成薄的高介电常数结晶膜，随后在高介电常数膜上沉积金属层。 该膜用作电容器层的电介质，其后连续地被图案化，被电介质覆盖，并且已经选择性地沉积用于互连电容器和形成通孔的金属层。 然后通孔的端部经历树枝状生长并连接冶金以提供可堆叠的互连能力。 使用适当的方式，使用具有金属芯层和具有电容配置芯的层来形成多层复合层叠堆叠电路板结构。 多层层叠堆叠电路板通过树枝状晶体和连接通孔和插塞结构的冶金，提供表面贴装的电子元件与复合板的功率，信号和电容去耦层之间的直接垂直连接。

公开(公告)号：US5745333A

公开(公告)日：1998-04-28

申请号：US342507

申请日：1994-11-21

申请人： Jerome Albert Frankeny ,  Richard Francis Frankeny ,  Terry Frederick Hayden ,  Ronald Lann Imken ,  Janet Louise Rice

发明人： Jerome Albert Frankeny ,  Richard Francis Frankeny ,  Terry Frederick Hayden ,  Ronald Lann Imken ,  Janet Louise Rice

IPC分类号： H05K1/16 ,  H05K3/46 ,  H01G4/06

CPC分类号： H05K3/462 ,  H05K1/162 ,  H05K3/4641 ,  H01L2224/81385 ,  H05K2201/0175 ,  H05K2201/0179 ,  H05K2201/0317 ,  H05K2201/0355 ,  H05K2201/09309 ,  H05K2201/09509 ,  H05K2201/09718 ,  H05K2203/0307 ,  H05K3/4623 ,  Y10T29/435 ,  Y10T29/49165 ,  Y10T29/49169

摘要： Method and apparatus for fabricating fine pitch pattern multilayer printed circuit boards involving laminar stackable board layers providing power distribution, signal distribution and capacitive decoupling. In one respect, the invention relates to the fabrication of board layers by beginning with a metallic core, patterning the core, selectively enclosing the core in a dielectric, selectively depositing metal to form vias, plugs and signal lines, and forming dendrites with joining metallurgy on the vias and plugs to provide stackable connection from above or below the plane of the board layer. In another aspect, the invention is directed to the use of a sol-gel process to form a thin high dielectric constant crystalline film onto a metallic sheet followed with a deposition of a metallic layer onto the high dielectric constant film. The film serves as the dielectric of a capacitor layer which is thereafter in succession patterned, covered by a dielectric, and has selectively deposited a metallic layer for interconnecting the capacitor and forming vias. The ends of the vias are thereafter subject to dendritic growth and joining metallurgy to provide stackable interconnection capability. A multilayer composite laminar stackable circuit board structure is created using, as appropriate, layers having metallic cores and layers having capacitively configured cores. The multilayer laminar stackable circuit board provides direct vertical connection between surface mounted electronic components and the power, signal and capacitive decoupling layers of the composite board through the dendrites and joining metallurgy of the via and plug formations.