公开(公告)号：US20120193783A1

公开(公告)日：2012-08-02

申请号：US13341125

申请日：2011-12-30

申请人： Ji-Sun HONG ,  Dae-Young CHOI ,  Mi-Yeon KIM

发明人： Ji-Sun HONG ,  Dae-Young CHOI ,  Mi-Yeon KIM

IPC分类号： H01L23/498 ,  H01L23/522

CPC分类号： H01L23/3128 ,  H01L23/49811 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A package on package is provided herein, the package on package including a first semiconductor package including a first substrate, a first semiconductor chip stacked on the first substrate, a plurality of first connection members on an upper surface of the first substrate and in a first molding material, and a plurality of via holes which respectively expose the plurality of first connection members through the first molding material; a second semiconductor package including a second substrate, a second semiconductor chip stacked on the second substrate, and a plurality of second connection members on a lower surface of the second substrate; and a plurality of connection portions including a plurality of cores and a plurality of conductive fusion layers surrounding the plurality of cores, wherein the plurality of conductive fusion layers contact the upper surface of the first substrate and the lower surface of the second substrate.

摘要翻译： 本文提供了一种封装在封装上的封装，其包装包括第一半导体封装，第一半导体封装包括第一衬底，堆叠在第一衬底上的第一半导体芯片，在第一衬底的上表面上的多个第一连接构件， 模制材料和多个通孔，其分别通过第一模塑材料暴露多个第一连接构件; 第二半导体封装，包括第二衬底，堆叠在第二衬底上的第二半导体芯片和在第二衬底的下表面上的多个第二连接构件; 以及包括多个芯的多个连接部分和围绕所述多个芯的多个导电熔融层，其中所述多个导电熔融层接触所述第一基板的上表面和所述第二基板的下表面。