公开(公告)号：US08144512B2

公开(公告)日：2012-03-27

申请号：US12642649

申请日：2009-12-18

申请人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Neil David Hutchinson ,  Sergey Anatolievich Gorobets

发明人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Neil David Hutchinson ,  Sergey Anatolievich Gorobets

IPC分类号： G11C11/34

CPC分类号： G11C11/5628 ,  G06F12/0246 ,  G06F2212/7203 ,  G11C7/1042 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5643

摘要： A memory system and methods of its operation are presented. The memory system includes a volatile buffer memory and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. When writing data to the non-volatile memory, the data is received from a host, stored in the buffer memory, transferred from the buffer memory to into read/write registers of the non-volatile memory circuit, and then written from the read/write registers to the first section of the non-volatile memory circuit using a binary write operation. Portions of the data and then subsequently folded from the first section of the non-volatile memory to the second section of the non-volatile memory, where a folding operation includes reading the portions of the data from multiple locations in the first section into the read/write registers and performing a multi-state programming operation of the portions of the data from the read/write registers into a location the second section of the non-volatile memory. The multi-state programming operations include a first phase and a second phase and one or more of the binary write operations are performed between the phases of the multi-state programming operations.

摘要翻译： 介绍了一种存储系统及其操作方法。 存储器系统包括易失性缓冲存储器和非易失性存储器电路，其中非易失性存储器电路具有数据以二进制格式存储的第一部分，以及第二部分， 状态格式。 当将数据写入非易失性存储器时，将数据从存储在缓冲存储器中的主机接收，从缓冲存储器传送到非易失性存储器电路的读/写寄存器，然后从读/ 使用二进制写操作将寄存器写入非易失性存储器电路的第一部分。 然后将数据的部分随后从非易失性存储器的第一部分折叠到非易失性存储器的第二部分，其中折叠操作包括将第一部分中的多个位置的数据的部分读入读取 /写寄存器，并且将数据的部分的数据从读/写寄存器执行到非易失性存储器的第二部分的位置的多状态编程操作。 多状态编程操作包括第一阶段和第二阶段，并且在多状态编程操作的阶段之间执行二进制写入操作中的一个或多个。

公开(公告)号：US08468294B2

公开(公告)日：2013-06-18

申请号：US12642611

申请日：2009-12-18

申请人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Steven Sprouse ,  Sergey Anatolievich Gorobets ,  Neil David Hutchinson

发明人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Steven Sprouse ,  Sergey Anatolievich Gorobets ,  Neil David Hutchinson

IPC分类号： G06F3/06 ,  G11C11/56

CPC分类号： G06F3/0608 ,  G06F3/0611 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G11C7/1042 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5648

摘要： A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes. The modes include a first mode, where the binary write operations to the first section of the memory are interleaved with folding operations at a first rate, and a second mode, where the number of folding operations relative to the number of the binary write operations to the first section of the memory are performed at a higher than in the first mode. The memory system then operates according to determined mode. The memory system may also include a third mode, where folding operations are background operations executed when the memory system is not receiving data from the host.

摘要翻译： 介绍了一种存储系统及其操作方法。 存储器系统包括控制器和非易失性存储器电路，其中非易失性存储器电路具有数据以二进制格式存储的第一部分和第二部分，其中数据以多状态格式存储 。 存储器系统从主机接收数据，并且对所述非易失性存储器电路的第一部分执行所接收数据的二进制写操作。 存储系统随后将数据的部分从非易失性存储器的第一部分折叠到非易失性存储器的第二部分，其中折叠操作包括从第一部分读取数据的部分，将数据重写成第二部分 使用多状态编程操作的非易失性存储器的一部分。 控制器根据多种模式之一确定操作存储器系统。 这些模式包括第一模式，其中对存储器的第一部分的二进制写入操作以第一速率进行折叠操作和第二模式，其中相对于二进制写入操作的数量的折叠操作的数量 存储器的第一部分在高于第一模式下执行。 然后，存储器系统根据确定的模式进行操作。 存储器系统还可以包括第三模式，其中折叠操作是当存储器系统未从主机接收数据时执行的背景操作。

公开(公告)号：US20110153913A1

公开(公告)日：2011-06-23

申请号：US12642611

申请日：2009-12-18

申请人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Steven Sprouse ,  Sergey Anatolievich Gorobets ,  Neil David Hutchinson

发明人： Jianmin Huang ,  Chris Avila ,  Lee M. Gavens ,  Steven Sprouse ,  Sergey Anatolievich Gorobets ,  Neil David Hutchinson

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F3/0608 ,  G06F3/0611 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G11C7/1042 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5648

摘要： A memory system and methods of its operation are presented. The memory system includes a controller and a non-volatile memory circuit, where the non-volatile memory circuit has a first section, where data is stored in a binary format, and a second section, where data is stored in a multi-state format. The memory system receives data from the host and performs a binary write operation of the received data to the first section of the non-volatile memory circuit. The memory system subsequently folds portions of the data from the first section of the non-volatile memory to the second section of the non-volatile memory, wherein a folding operation includes reading the portions of the data from the first section rewriting it into the second section of the non-volatile memory using a multi-state programming operation. The controller determines to operate the memory system according to one of multiple modes. The modes include a first mode, where the binary write operations to the first section of the memory are interleaved with folding operations at a first rate, and a second mode, where the number of folding operations relative to the number of the binary write operations to the first section of the memory are performed at a higher than in the first mode. The memory system then operates according to determined mode. The memory system may also include a third mode, where folding operations are background operations executed when the memory system is not receiving data from the host.

摘要翻译： 介绍了一种存储系统及其操作方法。 存储器系统包括控制器和非易失性存储器电路，其中非易失性存储器电路具有数据以二进制格式存储的第一部分和第二部分，其中数据以多状态格式存储 。 存储器系统从主机接收数据，并且对所述非易失性存储器电路的第一部分执行所接收数据的二进制写操作。 存储系统随后将数据的部分从非易失性存储器的第一部分折叠到非易失性存储器的第二部分，其中折叠操作包括从第一部分读取数据的部分，将数据重写成第二部分 使用多状态编程操作的非易失性存储器的一部分。 控制器根据多种模式之一确定操作存储器系统。 这些模式包括第一模式，其中对存储器的第一部分的二进制写入操作以第一速率进行折叠操作和第二模式，其中相对于二进制写入操作的数量的折叠操作的数量 存储器的第一部分在高于第一模式下执行。 然后，存储器系统根据确定的模式进行操作。 存储器系统还可以包括第三模式，其中折叠操作是当存储器系统未从主机接收数据时执行的背景操作。