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1.发明授权Integrated circuit die stacks having initially identical dies personalized with fuses and methods of manufacturing the same 有权集成电路芯片堆叠具有最初相同的裸片，其具有熔丝和其制造方法公开(公告)号：US09076770B2
公开(公告)日：2015-07-07
申请号：US13569267
申请日：2012-08-08
IPC分类号： H01L23/48 , H01L23/525 , H01L25/065 , H01L25/00 , H01L25/18
CPC分类号： H01L23/481 , H01L23/5256 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 具有安装在基板上的第一管芯的集成电路管芯堆叠，所述第一管芯被制造成与具有多个穿通硅通孔（“TSV”）的第二管芯初始相同，所述第一管芯通过在第一管芯上吹入保险丝来个性化， 将先前通过熔断保险丝连接的TSV转换成通过通孔（“PTV”），每个PTV通过第一管芯实现导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过在第二模具上吹入熔丝而进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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2.发明授权Integrated circuit die stacks having initially identical dies personalized with switches and methods of making the same 有权具有最初相同的裸片的集成电路芯片堆叠具有开关个性化和制造它们的方法公开(公告)号：US08310841B2
公开(公告)日：2012-11-13
申请号：US12617273
申请日：2009-11-12
CPC分类号： H01L25/0657 , H01L23/481 , H01L25/18 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 具有安装在基板上的第一管芯的集成电路管芯堆叠，所述第一管芯被制造成与具有多个穿通硅通孔（TSV）的第二管芯最初相同，所述第一管芯通过在第一管芯上打开开关来个性化， 先前通过开放式开关连接的TSV通过通孔（PTV），每个PTV实现通过第一管芯的导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过打开第二模具上的开关进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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3.发明授权Integrated circuit die stacks having initially identical dies personalized with switches 有权集成电路芯片堆栈具有最初相同的裸片，具有开关个性化公开(公告)号：US08780578B2
公开(公告)日：2014-07-15
申请号：US13556976
申请日：2012-07-24
CPC分类号： H01L25/0657 , H01L23/481 , H01L25/18 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 具有安装在基板上的第一管芯的集成电路管芯堆叠，所述第一管芯被制造成与具有多个穿通硅通孔（“TSV”）的第二管芯初始相同，所述第一管芯通过在第一管芯上打开开关来个性化， 将先前通过开放式开关连接的TSV转换成通过通孔（“PTV”），每个PTV通过第一管芯实现导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过打开第二模具上的开关进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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公开(公告)号：US20110109381A1
公开(公告)日：2011-05-12
申请号：US12616563
申请日：2009-11-11
IPC分类号： H01L25/00 , H01L25/065 , H01L21/822
CPC分类号： H01L23/5384 , H01L21/822 , H01L25/0657 , H01L2224/16 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555
摘要： An integrated circuit die stack including a first integrated circuit die mounted upon a substrate, the first die including pass-through vias (‘PTVs’) composed of conductive pathways through the first die with no connection to any circuitry on the first die; and a second integrated circuit die, identical to the first die, rotated with respect to the first die and mounted upon the first die, with the PTVs in the first die connecting signal lines from the substrate through the first die to through silicon vias (TSVs') in the second die composed of conductive pathways through the second die connected to electronic circuitry on the second die; with the TSVs and PTVs disposed upon each identical die so that the positions of the TSVs and PTVs on each identical die are rotationally symmetrical with respect to the TSVs and PTVs on the other identical die.
摘要翻译： 一种集成电路管芯堆叠，其包括安装在衬底上的第一集成电路管芯，所述第一管芯包括由通过所述第一管芯的导电通路组成的通孔（“PTV”），其没有连接到所述第一管芯上的任何电路; 以及第一集成电路管芯，与第一管芯相同，相对于第一管芯旋转并安装在第一管芯上，第一管芯中的PTV将来自衬底的信号线通过第一管芯连接到硅通孔（TSV） '）在由连接到第二管芯上的电子电路的第二管芯的导电通路组成的第二管芯中; 其中TSV和PTV设置在每个相同的管芯上，使得每个相同管芯上的TSV和PTV的位置相对于另一相同管芯上的TSV和PTV旋转对称。
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公开(公告)号：US08432027B2
公开(公告)日：2013-04-30
申请号：US12616563
申请日：2009-11-11
IPC分类号： H01L23/538 , H01L23/48
CPC分类号： H01L23/5384 , H01L21/822 , H01L25/0657 , H01L2224/16 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555
摘要： An integrated circuit die stack including a first integrated circuit die mounted upon a substrate, the first die including pass-through vias (‘PTVs’) composed of conductive pathways through the first die with no connection to any circuitry on the first die; and a second integrated circuit die, identical to the first die, rotated with respect to the first die and mounted upon the first die, with the PTVs in the first die connecting signal lines from the substrate through the first die to through silicon vias (‘TSVs’) in the second die composed of conductive pathways through the second die connected to electronic circuitry on the second die; with the TSVs and PTVs disposed upon each identical die so that the positions of the TSVs and PTVs on each identical die are rotationally symmetrical with respect to the TSVs and PTVs on the other identical die.
摘要翻译： 一种集成电路管芯堆叠，其包括安装在衬底上的第一集成电路管芯，所述第一管芯包括由通过所述第一管芯的导电通路组成的通孔（“PTV”），其没有连接到所述第一管芯上的任何电路; 以及第一集成电路管芯，与第一管芯相同，相对于第一管芯旋转并且安装在第一管芯上，第一管芯中的PTV将信号线从衬底通过第一管芯连接到硅通孔（“ TSV），其通过连接到第二管芯上的电子电路的第二管芯的导电通路构成; 其中TSV和PTV设置在每个相同的管芯上，使得每个相同管芯上的TSV和PTV的位置相对于另一相同管芯上的TSV和PTV旋转对称。
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6.发明申请Integrated Circuit Die Stacks Having Initially Identical Dies Personalized With Fuses 有权具有保险丝个性化的最初相同模具的集成电路模块公开(公告)号：US20120299640A1
公开(公告)日：2012-11-29
申请号：US13569267
申请日：2012-08-08
CPC分类号： H01L23/481 , H01L23/5256 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 集成电路芯片堆叠，其具有安装在基板上的第一裸片，所述第一模具被制造成与具有多个穿通硅通孔（TSV）的第二裸片最初相同，所述第一裸片通过在第一裸片上熔化熔丝而被个性化， 先前通过熔断保险丝连接的TSV通过通孔（PTV），每个PTV通过第一管芯实现导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过在第二模具上吹入熔丝而进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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7.发明授权Integrated circuit die stacks having initially identical dies personalized with fuses and methods of manufacturing the same 有权集成电路芯片堆叠具有最初相同的裸片，其具有熔丝和其制造方法公开(公告)号：US08315068B2
公开(公告)日：2012-11-20
申请号：US12616912
申请日：2009-11-12
CPC分类号： H01L23/481 , H01L23/5256 , H01L25/0657 , H01L25/18 , H01L25/50 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 集成电路芯片堆叠，其具有安装在基板上的第一裸片，所述第一模具被制造成与具有多个穿通硅通孔（TSV）的第二裸片最初相同，所述第一裸片通过在第一裸片上熔化熔丝而被个性化， 先前通过熔断保险丝连接的TSV通过通孔（PTV），每个PTV通过第一管芯实现导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过在第二模具上吹入熔丝而进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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8.发明申请Integrated Circuit Die Stacks Having Initially Identical Dies Personalized With Switches 有权具有开关个性化的初始相同模具的集成电路模块公开(公告)号：US20120286431A1
公开(公告)日：2012-11-15
申请号：US13556976
申请日：2012-07-24
IPC分类号： H01L23/522 , H01L21/50
CPC分类号： H01L25/0657 , H01L23/481 , H01L25/18 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 具有安装在基板上的第一管芯的集成电路管芯堆叠，所述第一管芯被制造成与具有多个穿通硅通孔（TSV）的第二管芯最初相同，所述第一管芯通过在第一管芯上打开开关来个性化， 先前通过开放式开关连接的TSV通过通孔（PTV），每个PTV实现通过第一管芯的导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过打开第二模具上的开关进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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9.发明申请Integrated Circuit Die Stacks Having Initially Identical Dies Personalized With Switches 有权具有开关个性化的初始相同模具的集成电路模块公开(公告)号：US20110110065A1
公开(公告)日：2011-05-12
申请号：US12617273
申请日：2009-11-12
IPC分类号： H05K1/14 , H01L23/538 , H01L21/50
CPC分类号： H01L25/0657 , H01L23/481 , H01L25/18 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2924/0002 , H01L2924/00
摘要： Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.
摘要翻译： 具有安装在基板上的第一管芯的集成电路管芯堆叠，所述第一管芯被制造成与具有多个穿通硅通孔（“TSV”）的第二管芯初始相同，所述第一管芯通过在第一管芯上打开开关来个性化， 将先前通过开放式开关连接的TSV转换成通过通孔（“PTV”），每个PTV通过第一管芯实现导电通路，而不连接到第一管芯上的任何电路; 以及第二模具，其被制造为与第一模具初始相同，然后通过打开第二模具上的开关进行个性化，第二模具安装在第一模具上，使得第一模具中的PTV将来自基板的信号线连接到第一模具 在第二次死亡时死于TSV。
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公开(公告)号：US08823162B2
公开(公告)日：2014-09-02
申请号：US13462994
申请日：2012-05-03
IPC分类号： H01L23/04
CPC分类号： H01L25/0657 , H01L25/50 , H01L2224/16145 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2924/19051
摘要： An integrated circuit die stack including a first integrated circuit die mounted upon a substrate, the first die including pass-through vias (‘PTVs’) composed of conductive pathways through the first die with no connection to any circuitry on the first die; and a second integrated circuit die, identical to the first die, shifted in position with respect to the first die and mounted upon the first die, with the PTVs in the first die connecting signal lines from the substrate through the first die to through silicon vias (‘TSVs’) in the second die composed of conductive pathways through the second die connected to electronic circuitry on the second die; with the TSVs and PTVs disposed upon each identical die so that the positions of the TSVs and PTVs on each identical die are translationally compatible with respect to the TSVs and PTVs on the other identical die.
摘要翻译： 一种集成电路管芯堆叠，其包括安装在衬底上的第一集成电路管芯，所述第一管芯包括由通过所述第一管芯的导电通路组成的通孔（“PTV”），其没有连接到所述第一管芯上的任何电路; 以及与第一裸片相同的第二集成电路裸片相对于第一裸片位置偏移并安装在第一裸片上，第一裸片中的PTV将来自衬底的信号线通过第一裸片连接到硅通孔 （“TSV”），其由通过第二管芯的导电通路组成，连接到第二管芯上的电子电路; 其中TSV和PTV设置在每个相同的管芯上，使得每个相同管芯上的TSV和PTV的位置相对于另一个相同管芯上的TSV和PTV平移兼容。
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