公开(公告)号：US08143902B2

公开(公告)日：2012-03-27

申请号：US12683101

申请日：2010-01-06

Applicant: Rei-Fu Huang ,  Jin-Bin Yang

Inventor： Rei-Fu Huang ,  Jin-Bin Yang

IPC: G01R31/07

CPC classification number: G11C17/18 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An eFuse with at least one fuse unit is provided. The fuse unit includes a common node, a sensing unit with a first input terminal and a second input terminal, at least one fuse coupled between the common node and the first input terminal of the sensing unit with a resistance, and a switching unit coupled between the common node and the second input terminal of the sensing unit. A resistance of the switching unit is equivalent to a first resistance in a normal mode and equivalent to a second resistance in a test mode, and the second resistance is higher than the first resistance. The sensing unit generates an output signal indicating whether the fuse is blown or not according to the resistances of the fuse and the switching unit.

Abstract translation: 提供至少一个保险丝单元的eFuse。 保险丝单元包括公共节点，具有第一输入端和第二输入端的感测单元，耦合在公共节点与感测单元的第一输入端之间的至少一个熔丝，以及耦合在 传感单元的公共节点和第二输入端。 开关单元的电阻等于在正常模式中的第一电阻并且等于测试模式中的第二电阻，并且第二电阻高于第一电阻。 感测单元根据保险丝和开关单元的电阻产生指示熔丝是否熔断的输出信号。

公开(公告)号：US20110090773A1

公开(公告)日：2011-04-21

申请号：US12854145

申请日：2010-08-10

Applicant: Chih-Ching Yu ,  Pi-Hai Liu ,  Yu-Hsuan Lin ,  Ying-Feng Huang ,  Yuh Cheng ,  Jin-Bin Yang

Inventor： Chih-Ching Yu ,  Pi-Hai Liu ,  Yu-Hsuan Lin ,  Ying-Feng Huang ,  Yuh Cheng ,  Jin-Bin Yang

IPC: G11B20/10

CPC classification number: G11B20/10009 ,  G11B20/10046 ,  G11B20/10055 ,  G11B20/10296 ,  G11B20/1037 ,  G11B20/10425 ,  G11B2220/2537

Abstract: An apparatus for generating Viterbi-processed data using an input signal obtained from reading an optical disc includes a Viterbi decoding unit and a control circuit. The Viterbi decoding unit is arranged to process the input signal and generate the Viterbi-processed data. In addition, the control circuit is arranged to control at least one component of the apparatus based upon at least one signal within the apparatus. Additionally, the component includes a phase locked loop (PLL) processing unit, an equalizer, and/or the Viterbi decoding unit. An associated apparatus including an equalizer and a Viterbi module is further provided. An associated apparatus including a Viterbi decoding unit and a control circuit is also provided. An associated apparatus including an equalizer, at least one offset/gain controller, and a Viterbi module is further provided. An associated apparatus including an equalizer, a Viterbi module, and a peak/bottom/central (PK/BM/DC) detector is also provided.

Abstract translation: 使用从读取光盘获得的输入信号来产生维特比处理数据的装置包括维特比解码单元和控制电路。 维特比解码单元被布置成处理输入信号并生成维特比处理的数据。 此外，控制电路被布置成基于装置内的至少一个信号来控制装置的至少一个部件。 此外，该组件包括锁相环（PLL）处理单元，均衡器和/或维特比解码单元。 还提供了包括均衡器和维特比模块的相关设备。 还提供了包括维特比解码单元和控制电路的相关设备。 还提供了包括均衡器，至少一个偏移/增益控制器和维特比模块的相关设备。 还提供了包括均衡器，维特比模块和峰值/底部/中央（PK / BM / DC）检测器的相关设备。

公开(公告)号：US20100202267A1

公开(公告)日：2010-08-12

申请号：US12766096

申请日：2010-04-23

Applicant: Chih-Yuan Chen ,  Jin-Bin Yang ,  Ching-Ning Chiu

Inventor： Chih-Yuan Chen ,  Jin-Bin Yang ,  Ching-Ning Chiu

IPC: G11B27/36

CPC classification number: G11B20/1217 ,  G11B7/0053 ,  G11B7/24082 ,  G11B19/28 ,  G11B2020/1239 ,  G11B2020/1247 ,  G11B2020/1248

Abstract: A light beam is scanned on a track of a recording medium, the track having a first track region and a second track region, each track region having a physical property that has recurring deviations. A wobble signal is derived from the light beam, the wobble signal having information associated with the recurring deviations. Whether the light beam is at the first track region or the second track region is determined based on a frequency, a period, or a pulse width of the wobble signal.

Abstract translation: 在记录介质的轨道上扫描光束，轨道具有第一轨道区域和第二轨道区域，每个轨道区域具有重复偏差的物理特性。 从光束导出摆动信号，摆动信号具有与重复偏差相关联的信息。 基于摆动信号的频率，周期或脉冲宽度来确定光束是处于第一轨迹区域还是第二轨迹区域。

公开(公告)号：US20090316551A1

公开(公告)日：2009-12-24

申请号：US12405253

申请日：2009-03-17

Applicant: Hang-Kaung Shu ,  Shih-Hsin Chen ,  Jin-Bin Yang ,  Ping-Sheng Chen

Inventor： Hang-Kaung Shu ,  Shih-Hsin Chen ,  Jin-Bin Yang ,  Ping-Sheng Chen

IPC: G11B20/18

CPC classification number: G11B20/18 ,  G11B20/1866 ,  G11B2020/1823 ,  G11B2220/2537

Abstract: An apparatus for writing encoded data into a storage medium includes a quality-check signal generator, a defect judgment unit and a verification unit. The quality-check signal generator is utilized for generating a quality-check signal; the defect judgment unit is coupled to the quality-check signal generator and is utilized for generating a defect judgment result according to the quality-check signal; and the verification unit is coupled to the defect judgment unit and is utilized for referring to the defect judgment result to selectively verify the encoded data that have been written into the storage medium.

Abstract translation: 用于将编码数据写入存储介质的装置包括质量检查信号发生器，缺陷判断单元和验证单元。 质量检查信号发生器用于产生质量检查信号; 缺陷判断单元耦合到质量检查信号发生器，并用于根据质量检查信号产生缺陷判断结果; 并且验证单元耦合到缺陷判断单元，并且用于参考缺陷判断结果以选择性地验证已写入存储介质的编码数据。

公开(公告)号：US20060239661A1

公开(公告)日：2006-10-26

申请号：US10907962

申请日：2005-04-22

Applicant: Meng-Ta Yang ,  Jin-Bin Yang ,  Yuh Cheng

Inventor： Meng-Ta Yang ,  Jin-Bin Yang ,  Yuh Cheng

IPC: H04N5/781

CPC classification number: G11B20/18 ,  G11B20/22 ,  H04N5/85

Abstract: An upper slicing level and a lower slicing level are determined to slice an RF signal into an upper sliced signal and a lower sliced signal respectively. A maximum pulse width occurs in the upper sliced signal or the lower sliced signal during a predetermined period is detected, and compared to a maximum run-length according to a clock signal. The frequency of the clock signal is adjusted according to the comparison result.

Abstract translation: 确定上切片电平和下切片电平以分别将RF信号切片成上切片信号和下切片信号。 在检测到预定时段期间，在上限信号或下限片信号中发生最大脉冲宽度，并根据时钟信号与最大游程长度进行比较。 根据比较结果调整时钟信号的频率。

公开(公告)号：US07791990B2

公开(公告)日：2010-09-07

申请号：US11532102

申请日：2006-09-15

Applicant: Jia-Horng Shieh ,  Jin-Bin Yang

Inventor： Jia-Horng Shieh ,  Jin-Bin Yang

IPC: G11B5/09

CPC classification number: G11B20/10527 ,  G11B27/105 ,  G11B2020/10694

Abstract: A data buffering method used when performing a read operation on an optical storage medium is disclosed. After a first data unit having an unidentifiable and temporarily undeducible ID address is reproduced through the read operation, the method starts storing the first data unit and subsequently reproduced data units into a buffer memory in turn. After a second ID address of a second data unit of the subsequently reproduced data units is identified, the method deduces a target memory address of the buffer memory according to the second ID address and a target ID address. A buffer start pointer is then set according to the deduced target memory address.

Abstract translation: 公开了一种在光学存储介质上执行读取操作时使用的数据缓冲方法。 在通过读取操作再现具有不可识别且暂时不可消除的ID地址的第一数据单元之后，该方法开始依次将第一数据单元和随后的再现数据单元存储到缓冲存储器中。 在识别出随后再现的数据单元的第二数据单元的第二ID地址之后，该方法根据第二ID地址和目标ID地址推断缓冲存储器的目标存储器地址。 然后根据推导的目标存储器地址设置缓冲区起始指针。

公开(公告)号：US20080232206A1

公开(公告)日：2008-09-25

申请号：US12131205

申请日：2008-06-02

Applicant: Chih-Yuan Chen ,  Jin-Bin Yang ,  Ching-Ning Chiu

Inventor： Chih-Yuan Chen ,  Jin-Bin Yang ,  Ching-Ning Chiu

IPC: G11B7/00

CPC classification number: G11B20/1217 ,  G11B7/0053 ,  G11B7/24082 ,  G11B19/28 ,  G11B2020/1239 ,  G11B2020/1247 ,  G11B2020/1248

Abstract: A light beam is scanned on a track of a recording medium, the track having a first track region and a second track region, each track region having a physical property that has recurring deviations. A wobble signal is derived from the light beam, the wobble signal having information associated with the recurring deviations. Whether the light beam is at the first track region or the second track region is determined based on a frequency, a period, or a pulse width of the wobble signal.

Abstract translation: 在记录介质的轨道上扫描光束，轨道具有第一轨道区域和第二轨道区域，每个轨道区域具有重复偏差的物理特性。 从光束导出摆动信号，摆动信号具有与重复偏差相关联的信息。 基于摆动信号的频率，周期或脉冲宽度来确定光束是处于第一轨迹区域还是第二轨迹区域。

公开(公告)号：US07279945B2

公开(公告)日：2007-10-09

申请号：US10710894

申请日：2004-08-11

Applicant: Kuen-Suey Hou ,  Jin-Bin Yang

Inventor： Kuen-Suey Hou ,  Jin-Bin Yang

IPC: H03L7/06

CPC classification number: H03L7/113 ,  G11B20/1403 ,  H03L7/087

Abstract: A phase locked loop (PLL) generates a phase locked signal and adjusts a frequency of the phase locked signal according to an incoming signal. The PLL includes an oscillator for generating the phased locked signal and a frequency detection module electrically coupled to the oscillator. The frequency detection module includes a pattern detector for detecting the two regular patterns in the incoming signal, a counter electrically coupled to the pattern detector for calculating the number of periods of the phase locked signal corresponding to the distance between the two regular patterns, and a comparator electrically coupled to the counter for comparing the number of periods with a predetermined value to generate a control signal, and using the control signal to control the oscillator to adjust the frequency of the phase locked loop signal.

Abstract translation: 锁相环（PLL）产生锁相信号，根据输入信号调节锁相信号的频率。 PLL包括用于产生相位锁定信号的振荡器和电耦合到振荡器的频率检测模块。 频率检测模块包括用于检测输入信号中的两个规则图案的模式检测器，电耦合到模式检测器的计数器，用于计算对应于两个规则模式之间的距离的锁相信号的周期数，以及 比较器电耦合到计数器，用于比较具有预定值的周期数以产生控制信号，并且使用控制信号来控制振荡器来调节锁相环信号的频率。

公开(公告)号：US07136338B2

公开(公告)日：2006-11-14

申请号：US10390646

申请日：2003-03-19

Applicant: Jin-Bin Yang

Inventor： Jin-Bin Yang

IPC: G11B7/09 ,  G11B7/00

CPC classification number: G11B7/0941 ,  G11B20/1403

Abstract: The present invention provides a control loop bandwidth adjusting system for adjusting a control loop bandwidth of an optical reproducing device. The optical reproducing device comprises a data signal processing circuit, which uses the control loop bandwidth to process the data signal. The control loop bandwidth adjusting system comprises a control loop bandwidth generator for generating the control loop bandwidth and a control loop bandwidth according to whether a defect signal corresponding to the defect data is received or not. If the control loop bandwidth adjusting module receives the defect data entry signal, the defect data duration signal, and the defect data exit signal, the control loope bandwidth is adjusted to a first bandwidth value, a second bandwidth value, and a third bandwidth value respectively.

Abstract translation: 本发明提供了一种用于调整光学再现装置的控制环路带宽的控制环路带宽调整系统。 光学再现装置包括数据信号处理电路，其使用控制环路带宽来处理数据信号。 控制环路带宽调整系统包括控制环带宽发生器，用于根据是否接收到与缺陷数据相对应的缺陷信号来产生控制环路带宽和控制环路带宽。 如果控制环路带宽调整模块接收到缺陷数据输入信号，缺陷数据持续时间信号和缺陷数据退出信号，则将控制带宽调整为第一带宽值，第二带宽值和第三带宽值 。

公开(公告)号：US20050168254A1

公开(公告)日：2005-08-04

申请号：US10710894

申请日：2004-08-11

Applicant: Kuen-Suey Hou ,  Jin-Bin Yang

Inventor： Kuen-Suey Hou ,  Jin-Bin Yang

IPC: G11B5/09 ,  G11B20/14 ,  H03L7/085 ,  H03L7/087 ,  H03L7/113

CPC classification number: H03L7/113 ,  G11B20/1403 ,  H03L7/087

Abstract: A phase locked loop (PLL) generates a phase locked signal and adjusts a frequency of the phase locked signal according to an incoming signal. The PLL includes an oscillator for generating the phased locked signal and a frequency detection module electrically coupled to the oscillator. The frequency detection module includes a pattern detector for detecting the two regular patterns in the incoming signal, a counter electrically coupled to the pattern detector for calculating the number of periods of the phase locked signal corresponding to the distance between the two regular patterns, and a comparator electrically coupled to the counter for comparing the number of periods with a predetermined value to generate a control signal, and using the control signal to control the oscillator to adjust the frequency of the phase locked loop signal.

Abstract translation: 锁相环（PLL）产生锁相信号，根据输入信号调节锁相信号的频率。 PLL包括用于产生相位锁定信号的振荡器和电耦合到振荡器的频率检测模块。 频率检测模块包括用于检测输入信号中的两个规则图案的模式检测器，电耦合到模式检测器的计数器，用于计算对应于两个规则模式之间的距离的锁相信号的周期数，以及 比较器电耦合到计数器，用于比较具有预定值的周期数以产生控制信号，并且使用控制信号来控制振荡器来调节锁相环信号的频率。