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公开(公告)号:US20100011164A1
公开(公告)日:2010-01-14
申请号:US12353403
申请日:2009-01-14
申请人: Jin-Hyeok CHOI , Sung-Hoon LEE , Si-Hoon HONG , Tae-Keun JEON
发明人: Jin-Hyeok CHOI , Sung-Hoon LEE , Si-Hoon HONG , Tae-Keun JEON
IPC分类号: G06F12/00
CPC分类号: G06F12/0646
摘要: A memory system is provided includes a host processor, and a plurality of cascade connected memory cards connected to the host processor. Each of the memory cards stores a same default relative card address (RCA) prior to initialization of the memory system. The host processor is configured to sequentially access each memory card using the default RCA, and to change the default RCA to a unique RCA upon each sequential access.
摘要翻译: 提供了一种存储器系统,包括主处理器和连接到主处理器的多个级联连接的存储卡。 每个存储卡在存储器系统的初始化之前存储相同的默认相对卡地址(RCA)。 主处理器配置为使用默认RCA顺序访问每个存储卡,并且在每次顺序访问时将默认RCA更改为唯一的RCA。
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公开(公告)号:US20120179871A1
公开(公告)日:2012-07-12
申请号:US13421964
申请日:2012-03-16
申请人: Jin-Hyeok CHOI , Sung-Hoon LEE , Si-Hoon HONG , Tae-Keun JEON
发明人: Jin-Hyeok CHOI , Sung-Hoon LEE , Si-Hoon HONG , Tae-Keun JEON
IPC分类号: G06F12/00
CPC分类号: G06F12/0646
摘要: A memory system is provided includes a host processor, and a plurality of cascade connected memory cards connected to the host processor. Each of the memory cards stores a same default relative card address (RCA) prior to initialization of the memory system. The host processor is configured to sequentially access each memory card using the default RCA, and to change the default RCA to a unique RCA upon each sequential access.
摘要翻译: 提供了一种存储器系统,包括主处理器和连接到主处理器的多个级联连接的存储卡。 每个存储卡在存储器系统的初始化之前存储相同的默认相对卡地址(RCA)。 主处理器配置为使用默认RCA顺序访问每个存储卡,并且在每次顺序访问时将默认RCA更改为唯一的RCA。
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3.
公开(公告)号:US20130299763A1
公开(公告)日:2013-11-14
申请号:US13619918
申请日:2012-09-14
申请人: Ji-Won MOON , Sung-Hoon LEE , Sook-Joo KIM
发明人: Ji-Won MOON , Sung-Hoon LEE , Sook-Joo KIM
IPC分类号: H01L45/00
CPC分类号: H01L45/08 , H01L27/2463 , H01L45/1233 , H01L45/1253 , H01L45/146
摘要: A variable resistance memory device that includes a first electrode, a second electrode, a variable resistance layer interposed between the first electrode and a second electrode. A metal oxide electrode is interposed between the first electrode and the variable resistance layer, and the metal oxide electrode does not include a nitrogen constituent.
摘要翻译: 一种可变电阻存储器件,包括第一电极,第二电极,插在第一电极和第二电极之间的可变电阻层。 金属氧化物电极介于第一电极和可变电阻层之间,金属氧化物电极不包括氮成分。
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4.
公开(公告)号:US20130168632A1
公开(公告)日:2013-07-04
申请号:US13596807
申请日:2012-08-28
申请人: Ji-Won MOON , Moon-Sig JOO , Sung-Hoon LEE , Jung-Nam Kim
发明人: Ji-Won MOON , Moon-Sig JOO , Sung-Hoon LEE , Jung-Nam Kim
CPC分类号: H01L45/08 , H01L45/1233 , H01L45/1246 , H01L45/146 , H01L45/147 , H01L45/1608 , H01L45/1641
摘要: A resistance variable memory device includes: a first electrode; a second electrode; a resistance variable layer interposed between the first electrode and the second electrode; and nano particles that are disposed in the resistance variable layer and have a lower dielectric constant than the resistance variable layer.
摘要翻译: 电阻可变存储器件包括:第一电极; 第二电极; 介于所述第一电极和所述第二电极之间的电阻变化层; 和纳米颗粒,其设置在电阻变化层中并具有比电阻变化层低的介电常数。
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