摘要:
An optoelectronic switch using millimeter wavelength (MMW) is provided. An r voltage pulse is applied to a device under test (DUT) for switching the photo-generated MMW power The DUT is operated under reverse bias. An optical light source with modulated MMW envelop is injected on to DUT for MMW power generation. Thus, based on change of the reverse bias, speed is violently changed and the MMW optoelectronic switch is thus obtained.
摘要:
A photonic generator is provided. The photonic generator uses ultra-wide band millimeter wave (MMW) for generating a high-power ultra-broad band white noise. Thus, the present disclosure can be used for failure detection of instantaneous all-band device, noise detection of instantaneous all-band amplifier and mixer, wide-band cipher transmission, pseudo-random bit generation, ADC dithering of analog-digital converter, saturation power test of wide-band optical communicator, system noise detection of MMW receiver, and gain and phase detection of MMW interferometer.
摘要:
An optoelectronic switch using millimeter wavelength (MMW) is provided. An r voltage pulse is applied to a device under test (DUT) for switching the photo-generated MMW power The DUT is operated under reverse bias. An optical light source with modulated MMW envelop is injected on to DUT for MMW power generation. Thus, based on change of the reverse bias, speed is violently changed and the MMW optoelectronic switch is thus obtained.
摘要:
A photonic generator is provided. The photonic generator uses ultra-wide band millimeter wave (MMW) for generating a high-power ultra-broad band white noise. Thus, the present disclosure can be used for failure detection of instantaneous all-band device, noise detection of instantaneous all-band amplifier and mixer, wide-band cipher transmission, pseudo-random bit generation, ADC dithering of analog-digital converter, saturation power test of wide-band optical communicator, system noise detection of MMW receiver, and gain and phase detection of MMW interferometer.
摘要:
The present disclosure provides a high-speed laser power converter (LPC). The LPC is able to be cascaded. The LPC has a high-speed photodiode (PD) performance even operated under a forward bias operational voltage. Thus, the present disclosure can generate power (instead of consume power) during high-speed data transmission in an optical interconnect (OI) system using 850 nano-meters (nm) wavelength vertical cavity surface-emitting laser (VCSEL).
摘要:
The present disclosure uses at least two cascaded photodetectors. Device area is increased to provide a bigger current than a single photodetector under the same bandwidth. Hence, bandwidth efficiency (BRP) and saturation current-bandwidth product (SCBP) are improved for a high speed, a high responsivity and a high bandwidth with simple structure and low cost.
摘要:
The present disclosure provides a high-speed laser power converter (LPC). The LPC is able to be cascaded. The LPC has a high-speed photodiode (PD) performance even operated under a forward bias operational voltage. Thus, the present disclosure can generate power (instead of consume power) during high-speed data transmission in an optical interconnect (OI) system using 850 nano-meters (nm) wavelength vertical cavity surface-emitting laser (VCSEL).
摘要:
The present disclosure uses at least two cascaded photodetectors. Device area is increased to provide a bigger current than a single photodetector under the same bandwidth. Hence, bandwidth efficiency (BRP) and saturation current-bandwidth product (SCBP) are improved for a high speed, a high responsivity and a high bandwidth with simple structure and low cost.
摘要:
A method is disclosed for identifying a physical failure location on an IC without using layout-versus-schematic (LVS) verification tool. In the method, the integrated circuit is tested with one or more test patterns to identify a failure port thereon. Hierarchical information of the failure port is generated through the test patterns. A physical location of the failure port in a layout of the integrated circuit is identified through a relation between the hierarchical information and a floor plan report. Layout information of a routing path associated with the physical location of the failure port is retrieved from a layout database.
摘要:
First, a wafer with a plurality of defects generated in a first semiconductor process is provided. A defect inspection is performed to detect the defects on the wafer. Then, an automatic defect classification is performed according to a predetermined defect database having a defect classification recipe generated from a second semiconductor process. After that, a verifying process is further performed by comparing the result of the automatic defect classification with that of a manual defect classification to verify the accuracy of the automatic defect classification.