公开(公告)号：US06548344B1

公开(公告)日：2003-04-15

申请号：US09987956

申请日：2001-11-16

申请人： Jochen Beintner ,  Stephan Kudelka ,  Thomas Dyer

发明人： Jochen Beintner ,  Stephan Kudelka ,  Thomas Dyer

IPC分类号： H01L218242

CPC分类号： H01L27/10864 ,  H01L27/10888 ,  H01L27/10891

摘要： In the formation of a semiconductor structure, where spacer formation is strongly dependent on the structure (e.g. taper), the improvement of a spacer formation on a poly stud planarized to pad nitride where an oxide is formed on top of the poly prior to the pad nitride strip, so that after pad nitride removal, the poly is etched back and nitride is deposited conformal followed by anisotropic nitride RIE etch, so that the oxide protects the nitride underneath from being etched.

摘要翻译： 在半导体结构的形成中，其中间隔物形成强烈地取决于结构（例如锥形），改善在平坦化为衬垫氮化物的多晶硅柱上的间隔物形成，其中在衬垫之前在聚氨酯的顶部上形成氧化物 氮化物条，使得在去除衬垫氮化物之后，将多晶硅回蚀刻，并且将氮化物保形共形，随后进行各向异性氮化物RIE蚀刻，使得氧化物保护下方的氮化物免受蚀刻。

公开(公告)号：US07157329B2

公开(公告)日：2007-01-02

申请号：US11053508

申请日：2005-02-08

申请人： Helmut Tews ,  Jochen Beintner ,  Stephan Kudelka

发明人： Helmut Tews ,  Jochen Beintner ,  Stephan Kudelka

IPC分类号： H01L21/8234

CPC分类号： H01L27/10867 ,  H01L27/10864

摘要： A trench capacitor with improved strap is disclosed. The strap is located above the top surface of the capacitor. The top surface of the trench capacitor, which is formed by the top surfaces of the collar and storage plate, is planar. By locating the strap on a planar surface, the divot present in conventional strap processes is avoided. This results in improved strap reliability and device performance.

摘要翻译： 公开了一种具有改进带的沟槽电容器。 带子位于电容器顶表面之上。 沟槽电容器的由表圈和存储板的顶表面形成的顶表面是平面的。 通过将带固定在平坦的表面上，避免了传统带状过程中存在的裂纹。 这样可以提高表带的可靠性和设备性能。

公开(公告)号：US20050158961A1

公开(公告)日：2005-07-21

申请号：US11053508

申请日：2005-02-08

申请人： Helmut Tews ,  Jochen Beintner ,  Stephan Kudelka

发明人： Helmut Tews ,  Jochen Beintner ,  Stephan Kudelka

IPC分类号： H01L21/20 ,  H01L21/8242 ,  H01L27/108 ,  H01L33/00

CPC分类号： H01L27/10867 ,  H01L27/10864

摘要： A trench capacitor with improved strap is disclosed. The strap is located above the top surface of the capacitor. The top surface of the trench capacitor, which is formed by the top surfaces of the collar and storage plate, is planar. By locating the strap on a planar surface, the divot present in conventional strap processes is avoided. This results in improved strap reliability and device performance.

摘要翻译： 公开了一种具有改进带的沟槽电容器。 带子位于电容器顶表面之上。 沟槽电容器的由表圈和存储板的顶表面形成的顶表面是平面的。 通过将带固定在平坦的表面上，避免了传统带状过程中存在的裂纹。 这样可以提高表带的可靠性和设备性能。

公开(公告)号：US06853025B2

公开(公告)日：2005-02-08

申请号：US10248801

申请日：2003-02-20

申请人： Helmut Tews ,  Jochen Beintner ,  Stephan Kudelka

发明人： Helmut Tews ,  Jochen Beintner ,  Stephan Kudelka

IPC分类号： H01L21/20 ,  H01L21/8242 ,  H01L27/108 ,  H01L33/00

CPC分类号： H01L27/10867 ,  H01L27/10864

摘要： A trench capacitor with improved strap is disclosed. The strap is located above the top surface of the capacitor. The top surface of the trench capacitor which is formed by the top surfaces of the collar and storage plate, is planar. By locating the strap on a planar surface, the divot present in conventional strap processes is avoided. This results in improved strap reliability and device performance.

摘要翻译： 公开了一种具有改进带的沟槽电容器。 带子位于电容器顶表面之上。 由套环和储存板的顶表面形成的沟槽电容器的顶表面是平面的。 通过将带固定在平坦的表面上，避免了传统带状过程中存在的裂纹。 这样可以提高表带的可靠性和设备性能。

公开(公告)号：US06352893B1

公开(公告)日：2002-03-05

申请号：US09324927

申请日：1999-06-03

申请人： Alexander Michaelis ,  Stephan Kudelka ,  Jochen Beintner ,  Oliver Genz

发明人： Alexander Michaelis ,  Stephan Kudelka ,  Jochen Beintner ,  Oliver Genz

IPC分类号： H01L218242

CPC分类号： H01L21/02238 ,  C25D11/32 ,  H01L21/02258 ,  H01L21/31675 ,  H01L27/10861

摘要： A method for fabricating a semiconductor device, in accordance with the present invention, includes the steps of providing a semiconductor wafer having exposed p-doped silicon regions and placing the wafer in an electrochemical cell such that a solution including electrolytes interacts with the exposed p-doped silicon regions to form an oxide on the exposed p-doped silicon regions when a potential difference is provided between the wafer and the solution.

摘要翻译： 根据本发明的用于制造半导体器件的方法包括以下步骤：提供具有暴露的p掺杂硅区域的半导体晶片并将晶片放置在电化学电池中，使得包含电解质的溶液与暴露的p掺杂硅区域相互作用， 当在晶片和溶液之间提供电位差时，掺杂的硅区域在暴露的p掺杂的硅区域上形成氧化物。

公开(公告)号：US07157328B2

公开(公告)日：2007-01-02

申请号：US11047312

申请日：2005-01-31

申请人： Helmut Horst Tews ,  Stephan Kudelka ,  Kenneth T. Settlemyer

发明人： Helmut Horst Tews ,  Stephan Kudelka ,  Kenneth T. Settlemyer

IPC分类号： H01L21/8242

CPC分类号： H01L21/30604 ,  H01L29/66181

摘要： The surface area of the walls of a trench formed in a substrate is increased. A barrier layer is formed on the walls of the trench such that the barrier layer is thinner near the corners of the trench and is thicker between the corners of the trench. A dopant is introduced into the substrate through the barrier layer to form higher doped regions in the substrate near the corners of the trench and lesser doped regions between the corners of the trench. The barrier layer is removed, and the walls of the trench are etched in a manner that etches the lesser doped regions of the substrate at a higher rate than the higher doped regions of the substrate to widen and lengthen the trench and to form rounded corners at the intersections of the walls of the trench.

摘要翻译： 在衬底中形成的沟槽的壁的表面积增加。 阻挡层形成在沟槽的壁上，使得阻挡层在沟槽的角部附近更薄，并且在沟槽的角部之间更厚。 通过势垒层将掺杂剂引入到衬底中，以在衬底附近的沟槽的角部附近形成更高的掺杂区域，并且在沟槽的角部之间形成较小的掺杂区域。 去除阻挡层，并且以如下方式蚀刻沟槽的壁，该方式是以比衬底的较高掺杂区域更高的速率蚀刻衬底的较小掺杂区域，以加宽和延长沟槽并且形成圆角 沟渠墙壁的交叉点。

公开(公告)号：US20060172486A1

公开(公告)日：2006-08-03

申请号：US11047312

申请日：2005-01-31

申请人： Helmut Tews ,  Stephan Kudelka ,  Kenneth Settlemyer

发明人： Helmut Tews ,  Stephan Kudelka ,  Kenneth Settlemyer

IPC分类号： H01L21/8242 ,  H01L29/94

CPC分类号： H01L21/30604 ,  H01L29/66181

摘要： The surface area of the walls of a trench formed in a substrate is increased. A barrier layer is formed on the walls of the trench such that the barrier layer is thinner near the corners of the trench and is thicker between the corners of the trench. A dopant is introduced into the substrate through the barrier layer to form higher doped regions in the substrate near the corners of the trench and lesser doped regions between the corners of the trench. The barrier layer is removed, and the walls of the trench are etched in a manner that etches the lesser doped regions of the substrate at a higher rate than the higher doped regions of the substrate to widen and lengthen the trench and to form rounded corners at the intersections of the walls of the trench.

摘要翻译： 在衬底中形成的沟槽的壁的表面积增加。 阻挡层形成在沟槽的壁上，使得阻挡层在沟槽的角部附近更薄，并且在沟槽的角部之间更厚。 通过势垒层将掺杂剂引入到衬底中，以在衬底附近的沟槽的角部附近形成更高的掺杂区域，并且在沟槽的角部之间形成较小的掺杂区域。 去除阻挡层，并且以如下方式蚀刻沟槽的壁，该方式是以比衬底的较高掺杂区域更高的速率蚀刻衬底的较小掺杂区域，以加宽和延长沟槽并且形成圆角 沟渠墙壁的交叉点。

公开(公告)号：US06916721B2

公开(公告)日：2005-07-12

申请号：US10722360

申请日：2003-11-26

申请人： Lars Heineck ,  Stephan Kudelka ,  Jörn Lützen ,  Hans-Peter Moll ,  Martin Popp ,  Till Schlösser ,  Johann Steinmetz

发明人： Lars Heineck ,  Stephan Kudelka ,  Jörn Lützen ,  Hans-Peter Moll ,  Martin Popp ,  Till Schlösser ,  Johann Steinmetz

IPC分类号： H01L21/20 ,  H01L21/334 ,  H01L21/425 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/94

CPC分类号： H01L27/10867 ,  H01L27/10829 ,  H01L29/66181 ,  H01L29/945

摘要： A method for fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected to the substrate on one side via a buried contact, using a hard mask with a corresponding mask opening.

摘要翻译： 一种在衬底中制造具有绝缘套环的沟槽电容器的方法，其使用具有相应掩模开口的硬掩模经由掩埋触点将其一侧的衬底电连接。

公开(公告)号：US20050079679A1

公开(公告)日：2005-04-14

申请号：US10920808

申请日：2004-08-18

申请人： Harald Seidl ,  Annette Sanger ,  Stephan Kudelka ,  Martin Gutsche

发明人： Harald Seidl ,  Annette Sanger ,  Stephan Kudelka ,  Martin Gutsche

IPC分类号： H01L21/02 ,  H01L21/334 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/94

CPC分类号： H01L29/66181 ,  H01L29/945

摘要： A method for fabricating a trench capacitor in a semiconductor substrate with a low-impedance inner electrode for use in memory cells of memory devices. A separating layer is provided on a dielectric layer in the active region of the trench capacitor. Afterward, a low-impedance inner electrode made of metal or a metal compound is introduced both in the active region and in the collar region lined with an insulation layer.

摘要翻译： 一种用于在具有用于存储器件的存储器单元的低阻抗内部电极的半导体衬底中制造沟槽电容器的方法。 隔离层设置在沟槽电容器的有源区中的电介质层上。 之后，将由金属或金属化合物制成的低阻抗内部电极引入有源区域和衬有隔离层的环形区域中。

公开(公告)号：US20050026384A1

公开(公告)日：2005-02-03

申请号：US10901406

申请日：2004-07-27

申请人： Stephan Kudelka ,  Martin Popp ,  Harald Seidl ,  Annette Sanger

发明人： Stephan Kudelka ,  Martin Popp ,  Harald Seidl ,  Annette Sanger

IPC分类号： H01L21/20 ,  H01L21/334 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/1087 ,  H01L27/10829 ,  H01L29/66181

摘要： Fabricating a trench capacitor with an insulation collar in a substrate, which is electrically connected thereto on one side through a buried contact, in particular, for a semiconductor memory cell with a planar selection transistor in the substrate and connected through the buried contact, includes providing a trench using an opening in a hard mask, providing a capacitor dielectric in lower and central trench regions, the collar in central and upper trench regions, and a conductive filling at least as far as the insulation collar topside, completely filling the trench with a filling material, carrying out STI trench fabrication process, removing the filling material and sinking the filling to below the collar topside, forming an insulation region on one side above the collar; uncovering a connection region on a different side above the collar, and forming the buried contact by depositing and etching back a metallic filling.

摘要翻译： 在衬底中制造具有绝缘套环的沟槽电容器，其在一侧通过埋入触点电连接，特别地，用于具有衬底中的平面选择晶体管并通过埋入触点连接的半导体存储器单元包括提供 在硬掩模中使用开口的沟槽，在下部和中部沟槽区域中提供电容器电介质，在中央和上部沟槽区域中的套环，以及至少与绝缘套环顶部一样的导电填充物，完全用一个 填充材料，执行STI沟槽制造工艺，去除填充材料并将填充物下沉到轴环顶部以下，在轴环上方的一侧上形成绝缘区域; 露出套环上方不同侧的连接区域，并通过沉积和蚀刻金属填充物来形成掩埋触点。