公开(公告)号：US20070296006A1

公开(公告)日：2007-12-27

申请号：US11850776

申请日：2007-09-06

申请人： James Adkisson ,  Andres Bryant ,  John Ellis-Monaghan ,  Mark Jaffe ,  Jeffrey Johnson ,  Alain Loiseau

发明人： James Adkisson ,  Andres Bryant ,  John Ellis-Monaghan ,  Mark Jaffe ,  Jeffrey Johnson ,  Alain Loiseau

IPC分类号： H01L31/00

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281 ,  H01L31/1037

摘要： The present invention relates to a design structure for a pixel sensor cell. The pixel sensor cell approximately doubles the available signal for a given quanta of light. A design structure for a pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明涉及一种像素传感器单元的设计结构。 像素传感器单元对于给定的光量大约使可用信号加倍。 具有降低的复杂度的像素传感器单元的设计结构包括形成在基板的表面下面的n型收集阱区域，用于收集电子辐射产生的电子撞击在像素传感器单元上​​，以及p型收集阱区域 用于收集由撞击光子产生的孔的基板的表面。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US20070235780A1

公开(公告)日：2007-10-11

申请号：US11765485

申请日：2007-06-20

申请人： John Ellis-Monaghan ,  Mark Jaffe ,  Alain Loiseau

发明人： John Ellis-Monaghan ,  Mark Jaffe ,  Alain Loiseau

IPC分类号： H01L31/0352

CPC分类号： H01L27/14643 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14679

摘要： An imaging circuit, an imaging sensor, and a method of imaging. The imaging cell circuit including one or more imaging cell circuits, each imaging cell circuit comprising: a transistor having a floating body for holding charge generated in the floating body in response to exposure of the floating body to electromagnetic radiation; means for biasing the transistor wherein an output of the transistor is responsive to the electromagnetic radiation; and means for selectively connecting the floating body to a reset voltage supply.

摘要翻译： 成像电路，成像传感器和成像方法。 所述成像单元电路包括一个或多个成像单元电路，每个成像单元电路包括：晶体管，具有浮动体，用于响应于浮体暴露于电磁辐射而保持在浮体中产生的电荷; 用于偏置晶体管的装置，其中晶体管的输出响应于电磁辐射; 以及用于选择性地将浮动体连接到复位电压源的装置。

公开(公告)号：US20070153104A1

公开(公告)日：2007-07-05

申请号：US11275417

申请日：2005-12-30

申请人： John Ellis-Monaghan ,  Mark Jaffe ,  Alain Loiseau ,  Richard Rassel

发明人： John Ellis-Monaghan ,  Mark Jaffe ,  Alain Loiseau ,  Richard Rassel

IPC分类号： H04N9/04

CPC分类号： H04N9/045

摘要： A pixel array in an image sensor, the image sensor and a digital camera including the image sensor. The image sensor includes a pixel array with colored pixels and unfiltered (color filter-free) pixels. Each unfiltered pixel occupies one or more array locations. The colored pixels may be arranged in uninterrupted rows and columns with unfiltered pixels disposed between the uninterrupted rows and columns. The image sensor may in CMOS with the unfiltered pixels reducing low-light noise and improving low-light sensitivity.

摘要翻译： 图像传感器中的像素阵列，图像传感器和包括图像传感器的数字照相机。 图像传感器包括具有彩色像素和未滤波（无滤色器）像素的像素阵列。 每个未过滤的像素占据一个或多个阵列位置。 彩色像素可以布置在不间断的行和列中，其中未过滤的像素布置在不间断的行和列之间。 图像传感器可以在CMOS中，未滤色像素降低低光噪声并改善低光灵敏度。

公开(公告)号：US20070029581A1

公开(公告)日：2007-02-08

申请号：US11161535

申请日：2005-08-08

申请人： James Adkisson ,  Andres Bryant ,  John Ellis-Monaghan ,  Mark Jaffe ,  Jeffrey Johnson ,  Alain Loiseau

发明人： James Adkisson ,  Andres Bryant ,  John Ellis-Monaghan ,  Mark Jaffe ,  Jeffrey Johnson ,  Alain Loiseau

IPC分类号： H01L27/148

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14689 ,  H01L31/035281

摘要： The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.

摘要翻译： 本发明是像素传感器单元及其制造方法。 像素传感器单元对于给定的光量大约使可用信号加倍。 本发明的器件利用通过在像素传感器单元电路中照射光子而产生的空穴。 具有降低的复杂度的像素传感器单元包括形成在基板的表面下面的n型收集阱区域，用于收集由电子辐射照射在像素传感器单元上​​产生的电子以及形成在基板表面下方的p型收集阱区域 用于收集由撞击光子产生的孔。 具有第一输入的电路结构耦合到n型收集阱区域，而第二输入端耦合到p型收集阱区域，其中像素传感器单元的输出信号是信号的差值的大小 的第一输入和第二输入的信号。

公开(公告)号：US20060192233A1

公开(公告)日：2006-08-31

申请号：US10906625

申请日：2005-02-28

申请人： John Ellis-Monaghan ,  Mark Jaffe ,  Alain Loiseau

发明人： John Ellis-Monaghan ,  Mark Jaffe ,  Alain Loiseau

IPC分类号： H01L27/148

CPC分类号： H01L27/14643 ,  H01L27/14603 ,  H01L27/14609 ,  H01L27/14679

摘要： An imaging circuit, an imaging sensor, and a method of imaging. The imaging cell circuit including one or more imaging cell circuits, each imaging cell circuit comprising: a transistor having a floating body for holding charge generated in the floating body in response to exposure of the floating body to electromagnetic radiation; means for biasing the transistor wherein an output of the transistor is responsive to the electromagnetic radiation; and means for selectively connecting the floating body to a reset voltage supply.

摘要翻译： 成像电路，成像传感器和成像方法。 所述成像单元电路包括一个或多个成像单元电路，每个成像单元电路包括：晶体管，具有浮动体，用于响应于浮体暴露于电磁辐射而保持在浮体中产生的电荷; 用于偏置晶体管的装置，其中晶体管的输出响应于电磁辐射; 以及用于选择性地将浮动体连接到复位电压源的装置。

公开(公告)号：US20060286778A1

公开(公告)日：2006-12-21

申请号：US11160365

申请日：2005-06-21

申请人： Brent Anderson ,  John Ellis-Monaghan ,  Alain Loiseau ,  Kirk Peterson

发明人： Brent Anderson ,  John Ellis-Monaghan ,  Alain Loiseau ,  Kirk Peterson

IPC分类号： H01L21/20

CPC分类号： H01L21/823807 ,  H01L21/823878 ,  H01L21/8252

摘要： Disclosed is a method of manufacturing dual orientation wafers. A trench is formed in a multi-layer wafer to a silicon substrate with a first crystalline orientation. The trench is filled with a silicon material (e.g., amorphous silicon or polysilicon trench). Isolation structures are formed to isolate the silicon material in the trench from a semiconductor layer with a second crystalline orientation. Additional isolation structures are formed within the silicon material in the trench and within the semiconductor layer. A patterned amorphization process is performed on the silicon material in the trench and followed by a recrystallization anneal such that the silicon material in the trench recrystallizes with the same crystalline orientation as the silicon substrate. The resulting structure is a semiconductor wafer with isolated semiconductor areas on the same plane having different crystalline orientations as well as isolated sections within each semiconductor area for device formation.

摘要翻译： 公开了制造双取向晶片的方法。 在多层晶片中形成具有第一晶体取向的硅衬底的沟槽。 沟槽填充有硅材料（例如，非晶硅或多晶硅沟槽）。 形成隔离结构以将沟槽中的硅材料与具有第二晶体取向的半导体层隔离。 另外的隔离结构形成在沟槽内和半导体层内的硅材料内。 对沟槽中的硅材料进行图案化非晶化处理，然后进行再结晶退火，使得沟槽中的硅材料以与硅衬底相同的结晶取向重结晶。 所得到的结构是在具有不同晶体取向的同一平面上的隔离半导体区域以及用于器件形成的每个半导体区域内的隔离部分的半导体晶片。

公开(公告)号：US07288788B2

公开(公告)日：2007-10-30

申请号：US10904896

申请日：2004-12-03

申请人： John Ellis-Monaghan ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： John Ellis-Monaghan ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L31/0224

CPC分类号： H01L27/14601 ,  H01L27/14612 ,  H01L27/14689

摘要： A novel Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, an image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.

摘要翻译： 一种新型的有源像素传感器（APS）单元结构及其制造方法。 特别地，形成具有预定传输门的图像传感器APS单元，其避免了作为后续制造步骤的结果的V变化。 根据本发明的优选实施例，图像传感器APS单元结构包括掺杂的p型钉扎层和n型掺杂栅极。 还提供了一种形成具有预制传输栅极和掺杂钉扎层的图像传感器APS单元的方法。 预制传输门防止栅极的一部分变成p型掺杂。

公开(公告)号：US20080096370A1

公开(公告)日：2008-04-24

申请号：US11955436

申请日：2007-12-13

申请人： Brent Anderson ,  John Ellis-Monaghan ,  Alain Loiseau ,  Kirk Peterson

发明人： Brent Anderson ,  John Ellis-Monaghan ,  Alain Loiseau ,  Kirk Peterson

IPC分类号： H01L21/20

CPC分类号： H01L21/823807 ,  H01L21/823878 ,  H01L21/8252

摘要： Disclosed is a method of manufacturing dual orientation wafers. A trench is formed in a multi-layer wafer to a silicon substrate with a first crystalline orientation. The trench is filled with a silicon material (e.g., amorphous silicon or polysilicon trench). Isolation structures are formed to isolate the silicon material in the trench from a semiconductor layer with a second crystalline orientation. Additional isolation structures are formed within the silicon material in the trench and within the semiconductor layer. A patterned amorphization process is performed on the silicon material in the trench and followed by a recrystallization anneal such that the silicon material in the trench recrystallizes with the same crystalline orientation as the silicon substrate. The resulting structure is a semiconductor wafer with isolated semiconductor areas on the same plane having different crystalline orientations as well as isolated sections within each semiconductor area for device formation.

摘要翻译： 公开了制造双取向晶片的方法。 在多层晶片中形成具有第一晶体取向的硅衬底的沟槽。 沟槽填充有硅材料（例如，非晶硅或多晶硅沟槽）。 形成隔离结构以将沟槽中的硅材料与具有第二晶体取向的半导体层隔离。 另外的隔离结构形成在沟槽内和半导体层内的硅材料内。 对沟槽中的硅材料进行图案化非晶化处理，然后进行再结晶退火，使得沟槽中的硅材料以与硅衬底相同的结晶取向重结晶。 所得到的结构是在具有不同晶体取向的同一平面上的隔离半导体区域以及用于器件形成的每个半导体区域内的隔离部分的半导体晶片。

公开(公告)号：US20060118835A1

公开(公告)日：2006-06-08

申请号：US10904896

申请日：2004-12-03

申请人： John Ellis-Monaghan ,  Jeffrey Johnson ,  Alain Loiseau

发明人： John Ellis-Monaghan ,  Jeffrey Johnson ,  Alain Loiseau

IPC分类号： H01L31/062

CPC分类号： H01L27/14601 ,  H01L27/14612 ,  H01L27/14689

摘要： A novel Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, an image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.

摘要翻译： 一种新型的有源像素传感器（APS）单元结构及其制造方法。 特别地，形成具有预定传输门的图像传感器APS单元，其避免了作为后续制造步骤的结果的V变化。 根据本发明的优选实施例，图像传感器APS单元结构包括掺杂的p型钉扎层和n型掺杂栅极。 还提供了一种形成具有预制传输栅极和掺杂钉扎层的图像传感器APS单元的方法。 预制传输门防止栅极的一部分变成p型掺杂。

公开(公告)号：US07888156B2

公开(公告)日：2011-02-15

申请号：US11864713

申请日：2007-09-28

申请人： John Ellis-Monaghan ,  Jeffrey B. Johnson ,  Alain Loiseau

发明人： John Ellis-Monaghan ,  Jeffrey B. Johnson ,  Alain Loiseau

IPC分类号： H01L31/068

CPC分类号： H01L27/14601 ,  H01L27/14612 ,  H01L27/14689

摘要： A novel CMOS image sensor Active Pixel Sensor (APS) cell structure and method of manufacture. Particularly, a CMOS image sensor APS cell having a predoped transfer gate is formed that avoids the variations of Vt as a result of subsequent manufacturing steps. According to the preferred embodiment of the invention, the CMOS image sensor APS cell structure includes a doped p-type pinning layer and an n-type doped gate. There is additionally provided a method of forming the CMOS image sensor APS cell having a predoped transfer gate and a doped pinning layer. The predoped transfer gate prevents part of the gate from becoming p-type doped.

摘要翻译： 一种新颖的CMOS图像传感器有源像素传感器（APS）单元结构及其制造方法。 特别地，形成具有预制传输门的CMOS图像传感器APS单元，其避免了作为后续制造步骤的结果的Vt的变化。 根据本发明的优选实施例，CMOS图像传感器APS单元结构包括掺杂的p型钉扎层和n型掺杂栅极。 还提供了一种形成具有预制传输栅极和掺杂钉扎层的CMOS图像传感器APS单元的方法。 预制传输门防止栅极的一部分变成p型掺杂。