Throughput enhancement for a universal host controller interface in a universal serial bus
    1.
    发明授权
    Throughput enhancement for a universal host controller interface in a universal serial bus 有权
    通用串行总线中通用主机控制器接口的吞吐量增强

    公开(公告)号:US06684272B1

    公开(公告)日:2004-01-27

    申请号:US09472374

    申请日:1999-12-23

    IPC分类号: G06F300

    CPC分类号: G06F13/385

    摘要: A timing enhancement for a USB controller determines if a short data packet is present. If so, data is placed in a buffer. If the buffer is full, data is sent. If the buffer is not full, the system looks to see if more data is available, if so takes it, if not it sends whatever is available.

    摘要翻译: USB控制器的时序增强器确定是否存在短数据包。 如果是这样,数据就放在缓冲区中。 如果缓冲区已满,则发送数据。 如果缓冲区未满,系统会查看是否有更多的数据可用,如果是这样,如果没有发送任何可用的数据。

    Method and apparatus for avoidance of invalid transactions in a bus host
controller
    3.
    发明授权
    Method and apparatus for avoidance of invalid transactions in a bus host controller 有权
    用于避免总线主机控制器中的无效事务的方法和装置

    公开(公告)号:US6067591A

    公开(公告)日:2000-05-23

    申请号:US168374

    申请日:1998-10-08

    IPC分类号: H04L12/403 G06F13/00 G06F3/00

    CPC分类号: G06F13/36 G06F13/4282

    摘要: A method and apparatus for ensuring frame integrity in a bus system are disclosed. In the disclosed system, each scheduled transaction is evaluated before execution to determine whether there is enough time in the frame to complete the transaction. By separately evaluating each transaction at the time of execution, held off transactions are not aborted if the frame ends before the transaction completes. Each transaction is evaluated by determining the approximate length of the transaction and comparing the approximate length to the number of byte times remaining in the frame. A step function is used to determine the approximate length by adding one of two possible constant values which take into account transaction overhead to the number of data bytes in the transaction, the selected constant value being dependent upon the number of data bytes, a smaller constant value being added for smaller transactions and a larger transaction value being added for larger transactions.

    摘要翻译: 公开了一种用于确保总线系统中的帧完整性的方法和装置。 在所公开的系统中,在执行之前评估每个调度的事务,以确定帧中是否有足够的时间来完成事务。 通过在执行时分别评估每个事务,如果该帧在事务完成之前结束,则不中止关闭事务。 通过确定事务的近似长度并将近似长度与帧中剩余的字节数进行比较来评估每个事务。 步进函数用于通过将两个可能的常数值中的一个值加起来来确定近似长度,这两个可能的常数值考虑事务开销到事务中的数据字节数,所选的常数值取决于数据字节的数量,较小的常数 为更小的事务添加值,并为更大的事务添加更大的事务值。

    Bus port power management
    4.
    发明授权
    Bus port power management 有权
    总线端口电源管理

    公开(公告)号:US08312183B2

    公开(公告)日:2012-11-13

    申请号:US12763994

    申请日:2010-04-20

    申请人: John S. Howard

    发明人: John S. Howard

    IPC分类号: G06F3/00

    摘要: For one disclosed embodiment, an apparatus comprises a display and a circuit. The circuit has a first port to be coupled to communicate over data lines with a Universal Serial Bus (USB) port of a device external to the apparatus. The circuit is operable to detect resume signaling of a duration of less than one millisecond and to transition the first port from a first state corresponding to an idle state of the data lines to a second, enabled state in response to the resume signaling. For one disclosed embodiment, the circuit is operable to drive resume signaling for a duration of less than one millisecond to initiate transition of the first port from a first state corresponding to an idle state of the data lines to a second, enabled state. Other embodiments are also disclosed.

    摘要翻译: 对于一个公开的实施例,一种装置包括显示器和电路。 该电路具有第一端口,用于通过数据线与设备外部设备的通用串行总线(USB)端口进行耦合。 电路可操作以响应于恢复信令,检测小于一毫秒的持续时间的恢复信令,并且使第一端口从对应于数据线的空闲状态的第一状态转变到第二使能状态。 对于一个公开的实施例,电路可操作以在小于一毫秒的持续时间内驱动恢复信令,以启动第一端口从对应于数据线的空闲状态的第一状态转换到第二启用状态。 还公开了其他实施例。

    System and method for supporting split transactions on a bus

    公开(公告)号:US07007119B2

    公开(公告)日:2006-02-28

    申请号:US09967775

    申请日:2001-09-28

    IPC分类号: G06F13/00

    CPC分类号: G06F13/4022 Y10S345/951

    摘要: System and method for supporting split transactions on a bus. The method may comprise processing a periodic frame list of external bus data frame by frame, and traversing each frame node by node. When a save place node is encountered in a first frame, the traversing jumps to a destination node pointed to by the save place node in a second frame, and continues the traversing there. When a restore place node is encountered when traversing the nodes in the second frame, the traversing returns to the node after the save place node in the first frame and continues the processing in the first frame. The method may be implemented on a system that comprises a processor, a memory, an internal bus, and an external bus controller. The external bus controller and the external bus data may support one or more versions of the Universal Serial Bus standard.

    Nak throttling for USB host controllers

    公开(公告)号:US07007110B2

    公开(公告)日:2006-02-28

    申请号:US09823558

    申请日:2001-03-30

    IPC分类号: G06F13/14

    CPC分类号: G06F13/385

    摘要: A method and apparatus for traversing a schedule with a bus master, the schedule having a plurality of elements, each element having information pertaining to one of a plurality of endpoints; executing transactions on a bus in accordance with the information pertaining to the plurality of endpoints; counting flow control events issued by individual endpoints; and skipping elements in the traversal of the schedule, the elements being skipped corresponding to endpoints which have issued a threshold number of flow control events.

    Transaction scheduling for a bus system in a multiple speed environment
    7.
    发明授权
    Transaction scheduling for a bus system in a multiple speed environment 失效
    在多速度环境中的总线系统的事务调度

    公开(公告)号:US06952429B2

    公开(公告)日:2005-10-04

    申请号:US10613971

    申请日:2003-07-03

    IPC分类号: H04L12/417 H04J3/24

    摘要: A method of and apparatus for communicating data using a hub. The method includes determining a first estimated unused capacity left in a first frame in which a second transaction is to be performed between a hub and an agent. The method then includes determining an amount of a first data that can fit into the estimated unused capacity and that is to be sent to the hub during a first transaction and then sent by the hub to the agent during the second transaction. The method also includes sending the first data to the hub during the first transaction.

    摘要翻译: 一种使用集线器传送数据的方法和装置。 该方法包括确定在第一帧中剩下的第一估计未使用容量,其中将在轮毂和代理之间执行第二事务。 该方法然后包括确定可以适应于估计的未使用容量的第一数据的量,并且将在第一事务期间发送到集线器,然后由集线器在第二事务期间发送到代理。 该方法还包括在第一次交易期间将第一数据发送到集线器。

    Local bus polling support buffer
    8.
    发明授权
    Local bus polling support buffer 有权
    本地总线轮询支持缓冲区

    公开(公告)号:US06748465B2

    公开(公告)日:2004-06-08

    申请号:US09968073

    申请日:2001-09-28

    IPC分类号: G06F1300

    摘要: A method and apparatus for allowing memory, cache and/or a processor to remain powered down while repetitive transactions are carried out on an I/O bus and actions are taken in response to feedback received from I/O devices coupled to the I/O bus.

    摘要翻译: 一种用于允许存储器,高速缓存和/或处理器在I / O总线上执行重复事务时保持断电的方法和装置,并且响应从耦合到I / O的I / O设备接收到的反馈而采取动作 总线。

    Method and apparatus for budget development under universal serial bus protocol in a multiple speed transmission environment
    9.
    发明授权
    Method and apparatus for budget development under universal serial bus protocol in a multiple speed transmission environment 有权
    通用串行总线协议在多速传输环境下的预算开发方法和装置

    公开(公告)号:US06678761B2

    公开(公告)日:2004-01-13

    申请号:US09823798

    申请日:2001-03-30

    IPC分类号: G06F300

    CPC分类号: G06F13/4059 G06F2213/0042

    摘要: A system and method for serial bus budget development and maintenance. The present invention relates to a method for budgeting transactions under a Universal Serial Bus (USB) protocol, utilizing split transactions, such as USB 2.0. The present invention provides for budgeting transactions occurring across a high-speed to full/low-speed translation, accommodating the full/low speed transactions as well as high-speed splits and data overhead in accordance with USB protocol.

    摘要翻译: 一种用于串行总线预算开发和维护的系统和方法。 本发明涉及一种利用诸如USB2.0之类的分割事务在通用串行总线(USB)协议下预算交易的方法。 本发明提供了在高速到全/低速转换之间发生的预算交易,适应全/低速交易以及根据USB协议的高速分割和数据开销。

    Digital system having a peripheral bus structure with at least one store-and-forward segment
    10.
    发明授权
    Digital system having a peripheral bus structure with at least one store-and-forward segment 有权
    数字系统具有具有至少一个存储和转发段的外围总线结构

    公开(公告)号:US06546018B1

    公开(公告)日:2003-04-08

    申请号:US09309484

    申请日:1999-05-10

    IPC分类号: H04J1500

    CPC分类号: G06F13/385

    摘要: A digital system is provided with a bus controller to operate and control a peripheral bus, wherein the bus controller selectively operates at least a first portion of the peripheral bus in a store-and-forward manner. The bus controller facilitates communication with a first bus agent in this first portion by sending a number of request packets destined for the first bus agent to a first hub in the first portion, in an integrated multi-packet form, in bulk, and at a first communication speed. The first hub buffers the request packets, and then forwards the request packets to the first bus agent, on a packet-by-packet basis, and at a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. In one embodiment, the first hub also receives communications destined for a second bus agent of this first portion, from the bus controller at the first communication speed, and repeats the communications for the second bus agent without buffering, at also the first communication speed. In another embodiment, the peripheral bus further includes a second portion, including a second hub that receives communications destined for a third bus agent in this second portion, from the bus controller at the second communication speed, and repeats the communications for the third bus agent without buffering, at also the second communication speed.

    摘要翻译: 数字系统设置有总线控制器以操作和控制外围总线,其中总线控制器以存储和转发的方式选择性地操作外围总线的至少第一部分。 总线控制器通过以大量方式以集成的多分组形式向第一部分中的第一集线器发送目的地为第一总线代理的多个请求分组,并且在 第一通讯速度。 第一集线器缓冲请求分组,然后以逐个分组的方式,以第二通信速度将请求分组转发到第一总线代理。 在一个实施例中,第二通信速度比第一通信速度慢。 在一个实施例中,第一集线器还以第一通信速度从总线控制器接收目的地为该第一部分的第二总线代理的通信,并且也以第一通信速度重复第二总线代理的通信而不进行缓冲。 在另一个实施例中,外围总线还包括第二部分,包括第二集线器,第二集线器以第二通信速度从总线控制器接收发往第二部分中的第三总线代理的通信,并重复第三总线代理的通信 没有缓冲,也是第二个通信速度。