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    Bus controller and associated device drivers for use to control a peripheral bus having at least one store-and-forward segment
    1.
    发明授权
    Bus controller and associated device drivers for use to control a peripheral bus having at least one store-and-forward segment 失效
    总线控制器和相关设备驱动器，用于控制具有至少一个存储转发段的外围总线

    公开(公告)号：US06629186B1

    公开(公告)日：2003-09-30

    申请号：US09309088

    申请日：1999-05-10

    申请人： John I. Garney ,  John S. Howard ,  Venkat Iyer

    发明人： John I. Garney ,  John S. Howard ,  Venkat Iyer

    IPC分类号： G06F1312

    CPC分类号： G06F13/102

    摘要： A bus controller and its associated device drivers are provided to a digital system to operate and control a peripheral bus, including the selective operation of at least a first portion of the peripheral bus in a store-and-forward manner. The device drivers include a number of programming instructions. Upon programmed with the programming instructions, a digital system is enabled to operate the bus controller to facilitate communication with a first bus agent in this first portion. The programming instructions package a number of request packets destined for the first bus agent into a multi-packet package, schedule the multi-packet package to be transmitted in bulk, at a first communication speed, to a first hub in the first portion, for the first hub to buffer the request packets, and then forward the request packets to the first bus agent, on a packet-by-packet basis and at a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. In one embodiment, the programming instructions further schedule communications destined for a second bus agent of this first portion, for transmission to the first hub, at the first communication speed, for the first hub to repeat the communications for the second bus agent without buffering, at also the first communication speed.

    摘要翻译： 将总线控制器及其相关的设备驱动器提供给数字系统以操作和控制外围总线，包括以存储和转发的方式选择性地操作外围总线的至少第一部分。 设备驱动程序包括一些编程指令。 在使用编程指令编程时，数字系统能够操作总线控制器以便于在该第一部分中与第一总线代理的通信。 编程指令将目的地为第一总线代理的多个请求分组封装成多分组包，将以多个第一通信速度批量发送的多分组分组调度到第一部分中的第一集线器，以便 第一集线器缓冲请求分组，然后逐个分组地以第二通信速度将请求分组转发到第一总线代理。 在一个实施例中，第二通信速度比第一通信速度慢。 在一个实施例中，编程指令进一步调度目的地为该第一部分的第二总线代理的通信，用于以第一通信速度传输到第一集线器，以使第一集线器重复第二总线代理的通信而不进行缓冲， 也是第一个通信速度。

    Digital system having a peripheral bus structure with at least one store-and-forward segment
    2.
    发明授权
    Digital system having a peripheral bus structure with at least one store-and-forward segment 有权
    数字系统具有具有至少一个存储和转发段的外围总线结构

    公开(公告)号：US06546018B1

    公开(公告)日：2003-04-08

    申请号：US09309484

    申请日：1999-05-10

    申请人： John I. Garney ,  John S. Howard ,  Venkat Iyer

    发明人： John I. Garney ,  John S. Howard ,  Venkat Iyer

    IPC分类号： H04J1500

    CPC分类号： G06F13/385

    摘要： A digital system is provided with a bus controller to operate and control a peripheral bus, wherein the bus controller selectively operates at least a first portion of the peripheral bus in a store-and-forward manner. The bus controller facilitates communication with a first bus agent in this first portion by sending a number of request packets destined for the first bus agent to a first hub in the first portion, in an integrated multi-packet form, in bulk, and at a first communication speed. The first hub buffers the request packets, and then forwards the request packets to the first bus agent, on a packet-by-packet basis, and at a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. In one embodiment, the first hub also receives communications destined for a second bus agent of this first portion, from the bus controller at the first communication speed, and repeats the communications for the second bus agent without buffering, at also the first communication speed. In another embodiment, the peripheral bus further includes a second portion, including a second hub that receives communications destined for a third bus agent in this second portion, from the bus controller at the second communication speed, and repeats the communications for the third bus agent without buffering, at also the second communication speed.

    摘要翻译： 数字系统设置有总线控制器以操作和控制外围总线，其中总线控制器以存储和转发的方式选择性地操作外围总线的至少第一部分。 总线控制器通过以大量方式以集成的多分组形式向第一部分中的第一集线器发送目的地为第一总线代理的多个请求分组，并且在 第一通讯速度。 第一集线器缓冲请求分组，然后以逐个分组的方式，以第二通信速度将请求分组转发到第一总线代理。 在一个实施例中，第二通信速度比第一通信速度慢。 在一个实施例中，第一集线器还以第一通信速度从总线控制器接收目的地为该第一部分的第二总线代理的通信，并且也以第一通信速度重复第二总线代理的通信而不进行缓冲。 在另一个实施例中，外围总线还包括第二部分，包括第二集线器，第二集线器以第二通信速度从总线控制器接收发往第二部分中的第三总线代理的通信，并重复第三总线代理的通信 没有缓冲，也是第二个通信速度。

    I/O peripheral device for use in a store-and-forward segment of a peripheral bus
    3.
    发明授权
    I/O peripheral device for use in a store-and-forward segment of a peripheral bus 有权
    用于外围总线存储转发段的I / O外围设备

    公开(公告)号：US06389501B1

    公开(公告)日：2002-05-14

    申请号：US09309087

    申请日：1999-05-10

    申请人： John I. Garney ,  John S. Howard ,  Venkat Iyer

    发明人： John I. Garney ,  John S. Howard ,  Venkat Iyer

    IPC分类号： G06F1312

    CPC分类号： G06F13/4059

    摘要： An I/O peripheral device is equipped with a first collection of circuitry to enable the I/O peripheral device to provide a store-and-forward manner of operation to a segment of a peripheral bus. The first collection of circuitry includes first buffering circuitry to buffer request packets destined for a first bus agent, received from a bus controller in an integrated multi-packet form, in bulk, and at a first communication speed. Furthermore, the first collection includes control circuitry to forward the request packets separately, in a packet-by-packet basis, to the first bus agent, in a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. The I/O peripheral device further includes second buffer circuitry to buffer response packets to a request from the first bus agent provided separately, and each at the slower second communication speed. The first control circuitry also facilitates forwarding of the buffered response packets to the bus controller in bulk at the faster first communication speed. In one embodiment, the I/O peripheral device further includes second control circuitry to repeat communications destined for a second bus agent, received from the bus controller at the first communication speed, for the second bus agent, at also the first communication speed. In one embodiment, the I/O peripheral device is a hub.

    摘要翻译： I / O外围设备配备有电路的第一集合，以使得I / O外围设备能够向外围总线的段提供存储转发的操作方式。 电路的第一集合包括第一缓冲电路，用于以批量和第一通信速度缓冲以集成多分组形式从总线控制器接收的去往第一总线代理的请求分组。 此外，第一集合包括控制电路，其以第二通信速度逐个分组地将请求分组转发到第一总线代理。 在一个实施例中，第二通信速度比第一通信速度慢。 I / O外围设备还包括第二缓冲器电路，用于将响应分组缓冲到来自分开提供的第一总线代理的请求，并且每个以较慢的第二通信速度缓冲。 第一控制电路还有助于将缓冲的响应分组以更快的第一通信速度批量转发到总线控制器。 在一个实施例中，I / O外围设备还包括第二控制电路，用于以第一通信速度，以第一通信速度从总线控制器接收第二总线代理的第二总线代理用于第二总线代理。 在一个实施例中，I / O外围设备是集线器。

    RENEWABLE ENERGY CALCULATOR
    4.
    发明申请
    RENEWABLE ENERGY CALCULATOR 审中-公开
    可再生能源计算器

    公开(公告)号：US20090313083A1

    公开(公告)日：2009-12-17

    申请号：US12138753

    申请日：2008-06-13

    申请人： Jim Dillon ,  Ronald Blagus ,  Stephen Parr ,  Venkat Iyer ,  Alan Houghton

    发明人： Jim Dillon ,  Ronald Blagus ,  Stephen Parr ,  Venkat Iyer ,  Alan Houghton

    IPC分类号： G06Q10/00 ,  G06Q50/00 ,  G06Q40/00

    CPC分类号： G06Q40/02 ,  G06Q10/06393 ,  G06Q30/02 ,  G06Q40/00 ,  Y04S10/58 ,  Y04S50/14

    摘要： A calculator or system for evaluating renewable energies in various geospatial areas or regions and for targeting potential buyers. The calculator may have a financial model which has inputs of renewable energy data by region including respective energy outputs and monetary values. The inputs may also include financial information related to establishing renewable energies. An output from the financial model may include a scorecard of information. Also, customer information may be added to the scorecard. The scorecard may have an output that targets potential customers of renewable energies.

    摘要翻译： 用于评估各种地理空间地区或地区的可再生能源并针对潜在买家的计算器或系统。 计算器可以具有按区域的可再生能源数据输入的财务模型，包括各自的能量输出和货币值。 投入还可能包括与建立可再生能源有关的财务信息。 财务模型的输出可以包括信息记分卡。 此外，客户信息可以被添加到记分卡。 记分卡可能具有针对可再生能源潜在客户的产出。

    Sync regeneration in a universal serial bus
    7.
    发明授权
    Sync regeneration in a universal serial bus 有权
    通用串行总线同步再生

    公开(公告)号：US06724848B1

    公开(公告)日：2004-04-20

    申请号：US09519511

    申请日：2000-03-06

    申请人： Venkat Iyer

    发明人： Venkat Iyer

    IPC分类号： H04L700

    CPC分类号： H04L7/046 ,  H04L7/005

    摘要： A Universal Serial Bus repeater is provided, comprising a method and apparatus for detecting a specified data pattern and regenerating or retransmitting the recognized data pattern. In some embodiments, the invention recognizes an end of sync signal, and is operable to retransmit the end of sync signal and the following data that is presumed to be valid as a result of sync recognition. In other embodiments, the invention recognizes and retransmits a properly aligned end of packet signal, the size of which is dependent on detection of whether the end of packet signal is a part of a start of frame packet.

    摘要翻译： 提供了一种通用串行总线中继器，包括用于检测指定数据模式并重新生成或重新发送所识别的数据模式的方法和装置。 在一些实施例中，本发明识别同步信号的结束，并且可操作用于重传同步信号的结束以及作为同步识别的结果被认为是有效的后续数据。 在其他实施例中，本发明识别和重新发送分组信号的正确对齐端，其大小取决于分组信号的结束是否是帧分组开始的一部分。