Dual-mode VLIW architecture providing a software-controlled varying mix of instruction-level and task-level parallelism
    1.
    发明授权
    Dual-mode VLIW architecture providing a software-controlled varying mix of instruction-level and task-level parallelism 有权
    双模VLIW架构提供了软件控制的不同组合的指令级和任务级并行性

    公开(公告)号:US06317820B1

    公开(公告)日:2001-11-13

    申请号:US09314494

    申请日:1999-05-19

    IPC分类号: G06F946

    摘要: This invention is a very long instruction word data processor including plural data registers, plural functional units and plural program counters and is selectively operable in either a first or second mode. In the first mode, the data processor executes a single instruction stream. In the second mode, the data processor executes two independent program instruction streams simultaneously. In the second mode the data processor may respond to two instruction streams accessing only corresponding halves of the data registers and function units. Alternatively, the data processor may respond to a first instruction stream including instructions referencing the whole data processor employing A side function units by alternatively dispatching (1) instructions referencing the A side data registers and the A side function units and (2) instructions referencing the B side data registers and the B side function units. In the first mode, the data processor fetches N bits of instructions each cycle. In the second mode the data processor may fetch N bits of instructions for alternate program counters on alternate cycles or fetches N/2 bits of each of the first and second program counters. The data processor includes interrupt steering and masking control logic allowing instructions to control whether the first instruction stream or the second instruction stream receives interrupts.

    摘要翻译: 本发明是一种非常长的指令字数据处理器,包括多个数据寄存器,多个功能单元和多个程序计数器,并且可选择性地以第一或第二模式工作。 在第一模式中,数据处理器执行单个指令流。 在第二模式中,数据处理器同时执行两个独立的程序指令流。 在第二模式中,数据处理器可以响应仅访问数据寄存器和功能单元的相应两半的两个指令流。 或者,数据处理器可以通过交替地调度(1)参考A侧数据寄存器和A侧功能单元的指令来响应包括参考整个数据处理器的整个数据处理器的指令的第一指令流,和(2)参考A侧功能单元的指令 B侧数据寄存器和B侧功能单元。 在第一种模式下,数据处理器每循环一次取指令N位指令。 在第二模式中,数据处理器可以在备用周期上取代备用程序计数器的N位指令,或者取出第一和第二程序计数器的每一个的N / 2位。 数据处理器包括允许指令控制第一指令流或第二指令流是否接收中断的中断转向和屏蔽控制逻辑。

    System and method for hard real-time garbage collection requiring a
write barrier but no read barrier
    3.
    发明授权
    System and method for hard real-time garbage collection requiring a write barrier but no read barrier 失效
    用于硬实时垃圾回收的系统和方法,需要写入屏障但没有读取障碍

    公开(公告)号:US5293614A

    公开(公告)日:1994-03-08

    申请号:US682806

    申请日:1991-04-08

    IPC分类号: G06F12/02 G06F12/12 G06F12/16

    摘要: Generally, in one form of the invention, a computer system for executing application programs in hard real-time, comprises a central processing unit (CPU) for executing the application programs and system programs and a computer memory partitioned into a data memory and a code memory. A garbage collector, which executes on said CPU, places a write barrier over certain portions of memory. Furthermore, it transfers an object from a location in the memory to a second object at another location in the memory. In a critical section, which may not be interrupted, it allocates sufficient space for the second object so that the entire contents from the first object can be copied into the second object, and in an interruptable section, it copies the entire contents of the first object into the second object. A write routine is linked into the application programs for updating objects in the computer memory. The write routine is operable to update both the first object and the second object whenever the garbage collector is transferring the contents of the object into the second object. Both copies are thereby kept current.

    摘要翻译: 通常,在本发明的一种形式中,用于执行硬实时应用程序的计算机系统包括用于执行应用程序和系统程序的中央处理单元(CPU),以及划分为数据存储器和代码的计算机存储器 记忆。 在所述CPU上执行的垃圾收集器在存储器的某些部分上施加写入障碍。 此外,它将对象从存储器中的位置传送到存储器中另一位置处的第二对象。 在可能不会中断的关键部分中,它为第二个对象分配足够的空间,以便可以将第一个对象的整个内容复制到第二个对象中,并且在可中断的部分中,它复制第一个对象的全部内容 对象进入第二个对象。 写入例程被链接到用于更新计算机存储器中的对象的应用程序中。 只要垃圾收集器将对象的内容传送到第二对象,写入例程可操作来更新第一对象和第二对象。 这两个副本因此保持当前状态。

    Method for managing virtual memory to separate active and stable memory
blocks
    4.
    发明授权
    Method for managing virtual memory to separate active and stable memory blocks 失效
    用于管理虚拟内存以分离主动和稳定的内存块的方法

    公开(公告)号:US4660130A

    公开(公告)日:1987-04-21

    申请号:US634334

    申请日:1984-07-24

    CPC分类号: G06F12/122 G06F12/0253

    摘要: A method for compacting blocks of memory in a demand paged virtual address space which includes a plurality of virtual address pages includes identifying active and stable blocks to be compacted by defining a pointer to indicate a page of the virtual memory space, and advancing the pointer to continually indicate the page of the beginning of the available virtual memory space. As new blocks are allocated, they are located in the virtual address space beginning at the next available location of the advancing pointer. As blocks are referenced by the user, they are moved to the current location of the advancing pointer, so that, stable blocks may be collected together on stable pages and active blocks are collected together on active pages. A disk memory is provided, and periodically the pages containing collected stable blocks are "paged-out" to it. The method improves the overall throughput of data in the memory by reducing the time waiting for disk, the time in which the CPU is delayed during frequent garbage collections, and the allocation response time. Also, the method insures efficient use of the backing store by insuring that sparsely allocated pages are not written out to disk.

    摘要翻译: 一种用于在包含多个虚拟地址页的需求分页虚拟地址空间中压缩存储器块的方法包括:通过定义指示虚拟存储器空间的页面的指针来识别待压缩的活动和稳定块,并且将指针推向 持续指示可用虚拟内存空间开头的页面。 当分配新的块时,它们位于从前进指针的下一个可用位置开始的虚拟地址空间中。 当用户引用块时,它们被移动到前进指针的当前位置,使得可以在稳定页面上一起收集稳定块,并且活动块在活动页面上一起收集。 提供磁盘存储器,并且周期性地将包含收集的稳定块的页面“分页”。 该方法通过减少等待磁盘的时间,在频繁的垃圾收集期间CPU被延迟的时间以及分配响应时间来提高存储器中数据的总体吞吐量。 此外,该方法通过确保稀疏分配的页面不被写出到磁盘来确保有效地使用后台存储。

    Method of generating profile-optimized code
    5.
    发明授权
    Method of generating profile-optimized code 有权
    生成配置文件优化代码的方法

    公开(公告)号:US06922829B2

    公开(公告)日:2005-07-26

    申请号:US09761152

    申请日:2001-01-17

    IPC分类号: G06F9/45 G06F9/44

    CPC分类号: G06F8/4441

    摘要: A method of generating profiled optimized code using user interface (17) that allows a user to visually understand, inspect, and manipulate a compiled application program as a function of compiler options, such as, code size and speed, is provided. A program (11) is compiled in a compiler (13) with two or more compiler options such as size and speed and the resulting executables (14) are profiled (15). The results of the profiles (19) are analyed in a solver (21) for generating sets of useful solutions (23) wherein the sets have methods of compiling at the function level. The useful solutions (23) are displayed (18) at the user interface (17) to allow the user to visually understand, inspect and manipulate compiler options to select compiler options (13a) for the program.

    摘要翻译: 提供了一种使用用户界面(17)生成分析优化代码的方法,该方法允许用户视编程应用程序视觉上理解,检查和操作编译应用程序,这些编译应用程序作为代码大小和速度等编译器选项。 程序(11)在具有两个或多个编译器选项(诸如大小和速度)的编译器(13)中编译,并且生成的可执行程序(14)被分析(15)。 在求解器(21)中分析简档(19)的结果,用于生成有用解的集合(23),其中集合具有在功能级别的编译方法。 有用的解决方案(23)在用户界面(17)处被显示(18),以允许用户在视觉上理解,检查和操纵编译器选项以选择程序的编译器选项(13a)。

    Method for managing virtual memory to separate active and stable memory
blocks
    6.
    发明授权
    Method for managing virtual memory to separate active and stable memory blocks 失效
    用于管理虚拟内存以分离主动和稳定的内存块的方法

    公开(公告)号:US4758944A

    公开(公告)日:1988-07-19

    申请号:US644072

    申请日:1984-08-24

    IPC分类号: G06F12/00 G06F12/02 G06F12/12

    CPC分类号: G06F12/023 G06F12/127

    摘要: A pointer, N, indicates an address in a virtual memory space of a demand paged memory including a plurality of virtual address pages and a fixed number of physical memory pages into which blocks of information can be written. A back-up memory store is provided for containing paged-out memory pages. The pointer, N, is advanced along the virtual address pages to indicate the next available virtual address page for allocation, and newly allocated blocks are located on the virtual address page pointed to by said pointer N. Should the necessary space for a block allocation not exist on the page pointed to by said pointer, N, a page which is most recently used and least sparsely utilized is identified from the physical pages onto which blocks have been previously written the block is allocated on that page. If no space remains on the virtual address pages in physical memory for block allocation, then, a least recently used and most sparsely allocated page is identified and paged-out to the back-up store.

    摘要翻译: 指针N指示包括多个虚拟地址页面和固定数量的物理存储器页面的需求分页存储器的虚拟存储器空间中的地址,其中可以写入信息块。 提供了一个备用内存存储器,用于包含分页存储器页面。 指针N沿着虚拟地址页进行,以指示用于分配的下一个可用虚拟地址页,并且新分配的块位于由指针N指向的虚拟地址页上。如果块分配的必要空间不是 存在于由所述指针N指向的页面上,从最初使用并且最不稀疏地使用的页面被从先前写入块的物理页面识别,该块被分配在该页面上。 如果块物理内存中的虚拟地址页面上没有剩余的空间用于块分配,则最近最少使用和最稀疏分配的页面被识别并分页到备份存储区。

    Method for selective solicitation of user assistance in the performance tuning process
    7.
    发明授权
    Method for selective solicitation of user assistance in the performance tuning process 有权
    在性能调整过程中选择性地请求用户帮助的方法

    公开(公告)号:US07237234B2

    公开(公告)日:2007-06-26

    申请号:US10317786

    申请日:2002-12-12

    IPC分类号: G06F9/45

    CPC分类号: G06F8/443

    摘要: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.

    摘要翻译: 提供了一个编译器工具来选择性地从程序员那里寻求帮助,以便改进由编译器编译的代码的优化。 正在编译一个程序,如果编译器只知道某些信息,则会跟踪它可以做得更好的地方。 用户被呈现一个或多个建议,每个建议每个标识一个问题,由于没有足够的信息和关于如何向编译器提供附加信息的一个或多个建议,编译器进行特定的优化。 该列表通常被过滤,以便仅提供导致更好性能的很可能性的缺失信息的一部分。 其他缺少的信息不被请求。

    Apparatus and method removing increment/decrement pairs to decimate a
block reference stream
    10.
    发明授权
    Apparatus and method removing increment/decrement pairs to decimate a block reference stream 失效
    装置和方法去除增量/减量对以抽取块参考流

    公开(公告)号:US4716524A

    公开(公告)日:1987-12-29

    申请号:US719778

    申请日:1985-04-04

    IPC分类号: G06F12/02 G06F1/00

    CPC分类号: G06F12/0261

    摘要: A reference count decimator and method of operating a computer system includes a decimator queue for containing indications of pointer reference count increments. Apparatus is provided for determining if a referencing event would cause a decrement of a reference count, and for searching the decimator queue to determine if a counterpart of the reference event exists in the queue, to thereby define an increment/decrement pair. If an increment/decrement pair is determined to exist in the queue, the increment/decrement pair is cancelled from the queue so that the increment/decrement point reference pairs are removed from the computer system without actually modifying the reference count indications associated with the memory blocks.

    摘要翻译: 参考计数抽取器和操作计算机系统的方法包括用于包含指针参考计数增量的指示的抽取器队列。 提供了用于确定参考事件是否将引起参考计数减少的装置,并且用于搜索抽取器队列以确定参考事件的对应物是否存在于队列中,从而定义增量/减量对。 如果确定队列中存在增量/减量对,则从队列中取消增减对,从而从计算机系统中移除递增/递减点引用对,而不实际修改与存储器相关联的引用计数指示 块。