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公开(公告)号：US08843693B2
公开(公告)日：2014-09-23
申请号：US13109972
申请日：2011-05-17
申请人： Jonathan Hsu , Chris Nga Yee Avila , Alexander Kwok-Tung Mak , Sergey Anatolievich Gorobets , Tien-chien Kuo , Yee Lih Koh , Jun Wan
发明人： Jonathan Hsu , Chris Nga Yee Avila , Alexander Kwok-Tung Mak , Sergey Anatolievich Gorobets , Tien-chien Kuo , Yee Lih Koh , Jun Wan
CPC分类号： G11C16/3427 , G06F12/1408 , G11C7/1006 , G11C7/1012
摘要： A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.
摘要翻译： 与存储器控制器协作的存储器件在将其存储在非易失性存储器单元阵列之前，使用所选择的加密密钥对每个数据单元进行加扰。 这有助于减少由特定数据模式的重复和长期存储引起的编程干扰，用户读取干扰和浮动栅极到浮动栅极耦合。 对于具有逻辑地址并用于存储在物理地址的给定页面的数据，从作为逻辑地址和物理地址的函数的有限序列中选择密钥。 在块管理方案中，存储器阵列被组织成擦除块，物理地址是每个块中的相对页号。 当逻辑地址分组为逻辑组并作为组操作并且每个组可存储到子块中时，物理地址是子块中的相对页号。
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公开(公告)号：US20120297111A1
公开(公告)日：2012-11-22
申请号：US13109972
申请日：2011-05-17
申请人： Jonathan Hsu , Chris Nga Yee Avila , Alexander Kwok-Tung Mak , Sergey Anatolievich Gorobets , Tien-Chien Kuo , Yee Lih Koh , Jun Wan
发明人： Jonathan Hsu , Chris Nga Yee Avila , Alexander Kwok-Tung Mak , Sergey Anatolievich Gorobets , Tien-Chien Kuo , Yee Lih Koh , Jun Wan
IPC分类号： G06F12/02
CPC分类号： G11C16/3427 , G06F12/1408 , G11C7/1006 , G11C7/1012
摘要： A memory device cooperating with a memory controller scrambles each unit of data using a selected scrambling key before storing it in an array of nonvolatile memory cells. This helps to reduce program disturbs, user read disturbs, and floating gate to floating gate coupling that result from repeated and long term storage of specific data patterns. For a given page of data having a logical address and for storing at a physical address, the key is selected from a finite sequence thereof as a function of both the logical address and the physical address. In a block management scheme the memory array is organized into erase blocks, the physical address is the relative page number in each block. When logical address are grouped into logical groups and manipulated as a group and each group is storable into a sub-block, the physical address is the relative page number in the sub-block.
摘要翻译： 与存储器控制器协作的存储器件在将其存储在非易失性存储器单元阵列之前，使用所选择的加密密钥对每个数据单元进行加扰。 这有助于减少由特定数据模式的重复和长期存储引起的程序干扰，用户读取干扰和浮动栅极到浮动栅极耦合。 对于具有逻辑地址并用于存储在物理地址的给定页面的数据，从作为逻辑地址和物理地址的函数的有限序列中选择密钥。 在块管理方案中，存储器阵列被组织成擦除块，物理地址是每个块中的相对页号。 当逻辑地址分组为逻辑组并作为组操作并且每个组可存储到子块中时，物理地址是子块中的相对页号。
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公开(公告)号：US20150095546A1
公开(公告)日：2015-04-02
申请号：US14044548
申请日：2013-10-02
IPC分类号： G06F3/06
CPC分类号： G06F12/00 , G06F3/0649 , G06F12/0246 , G06F12/0292 , G06F2212/1036 , G06F2212/7201 , G06F2212/7208 , G06F2212/7211
摘要： A method and system are disclosed for remapping logical addresses between memory banks of discrete or embedded multi-bank storage device. The method may include a controller of a storage device tracking a total erase count for a storage device, determining if an erase count imbalance greater than a threshold exists between banks, and then remapping logical address ranges from the highest erase count bank to the lowest erase count bank to even out wear between the banks. The system may include a controller that may maintain a bank routing table, an erase counting mechanism and execute instructions for triggering a remapping process to remap an amount of logical addresses such that an address range is reduced for a hotter bank and increased for a colder bank.
摘要翻译： 公开了用于重新映射离散或嵌入式多存储存储设备的存储体之间的逻辑地址的方法和系统。 该方法可以包括跟踪存储设备的总擦除计数的存储设备的控制器，确定在存储体之间是否存在大于阈值的擦除计数不平衡，然后将逻辑地址范围从最高擦除计数存储区重新映射到最低擦除 计数银行甚至在银行之间穿戴。 系统可以包括可以维护银行路由表，擦除计数机制和执行指令的控制器，用于触发重映射处理以重新映射逻辑地址的数量，使得对于较热的银行减少地址范围并且对于较冷的银行而言增加 。
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4.发明授权Storing data in parallel in a flash storage device using on chip page shifting between planes 有权在闪存存储设备中并行存储数据，使用片上页面在平面之间切换公开(公告)号：US08775722B2
公开(公告)日：2014-07-08
申请号：US13341543
申请日：2011-12-30
IPC分类号： G06F12/00
CPC分类号： G11C7/1012 , G11C11/5621 , G11C16/10
摘要： Methods and systems are disclosed herein for storing data in a memory device. Data for multiple pages is written in parallel using plane interleaving. For example, in a four plane write, a first set of four pages are written in the following sequence: 0, 1, 2, 3. A second set of four pages, after plane interleaving, are written in the following sequent: 7, 4, 5, 6. After writing the data, the pages of written data are read, page swapped if necessary, and then written into another portion of memory (such as MLC).
摘要翻译： 本文公开了用于将数据存储在存储器件中的方法和系统。 使用平面交错并行写入多页数据。 例如，在四平面写入中，按照以下顺序写入第一组四页：0,1,2,3。在平面交织之后的第二组四页被写入随后的后续步骤：7， 写入数据后，读取写入数据的页面，如果需要，页面交换，然后写入存储器的另一部分（如MLC）。
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公开(公告)号：US08621323B2
公开(公告)日：2013-12-31
申请号：US12353185
申请日：2009-01-13
CPC分类号： G06F12/0246 , G06F11/1008 , G11C7/1039 , G11C7/1051 , G11C16/3436
摘要： The present invention presents methods and architectures for the pipelining of read operation with write operations. In particular, methods are presented for pipelining data relocation operations that allow for the checking and correction of data in the controller prior to its being re-written, but diminish or eliminate the additional time penalty this would normally incur. A number of architectural examples are described to facilitate these methods, including: introducing two registers on the memory where each is independently accessible by the controller; allowing a first memory register to be written from while a second register is written to; introducing two registers on the memory where the contents of the registers can be swapped.
摘要翻译： 本发明提出了用于具有写入操作的读取操作的流水线的方法和架构。 特别地，提出了用于流水线数据迁移操作的方法，其允许在控制器被重写之前检查和校正控制器中的数据，但是减少或消除通常会产生的额外时间损失。 描述了许多架构示例来促进这些方法，包括：在存储器中引入两个寄存器，每个寄存器可由控制器独立访问; 允许在写入第二个寄存器时写入第一个存储器寄存器; 在存储器中引入两个寄存器，其中寄存器的内容可以交换。
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公开(公告)号：US08208322B2
公开(公告)日：2012-06-26
申请号：US13108477
申请日：2011-05-16
IPC分类号： G11C7/00
CPC分类号： G06F13/1615 , G06F3/0625 , G06F3/0659 , G06F3/0688 , G06F13/4239 , G11C7/1039 , Y02D10/154
摘要： Methods and apparatus for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time are useful in the control of concurrent access of memory arrays. One method includes implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time. The controller is configured to wait for the at least one of the arrays to complete before initiating a transfer to and from a further array.
摘要翻译： 在具有非易失性存储器的存储器系统中使用的方法和装置以及用于从一次访问的多个可用阵列限制非易失性存储器阵列的数量的控制器在对存储器阵列的并发访问的控制中是有用的。 一种方法包括实现用于将数据传送到非易失性存储器阵列和从非易失性存储器阵列传送数据的流水线序列，并限制一次操作的有源阵列的数量。 控制器被配置为等待至少一个数组完成，然后开始向另一阵列传送数据。
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7.发明申请Techniques of Maintaining Logical to Physical Mapping Information in Non-Volatile Memory Systems 有权在非易失性存储器系统中维护逻辑到物理映射信息的技术公开(公告)号：US20110320684A1
公开(公告)日：2011-12-29
申请号：US12821423
申请日：2010-06-23
CPC分类号： G06F12/0246 , G06F2212/7205 , G06F2212/7207
摘要： A non-volatile memory system writes logical to physical conversion data to the same memory blocks as user data, and as part of the same page as a segment of user data, as data segments are received and written. When a data block is subsequently compacted and obsolete data removed, the user data from the block is written to a one block and some or all of the logical to physical conversion data from the block is written to another block dedicated for the storage of such logical to physical mapping data.
摘要翻译： 非易失性存储器系统将物理转换数据逻辑写入与用户数据相同的存储器块，并且作为与用户数据段相同的页面的一部分，作为数据段被接收和写入。 当随后压缩数据块并去除过时的数据时，来自块的用户数据被写入一个块，并且来自块的逻辑到物理转换数据的一些或全部被写入专用于存储这种逻辑的另一个块 到物理映射数据。
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公开(公告)号：US20110310683A1
公开(公告)日：2011-12-22
申请号：US13108477
申请日：2011-05-16
IPC分类号： G11C7/00
CPC分类号： G06F13/1615 , G06F3/0625 , G06F3/0659 , G06F3/0688 , G06F13/4239 , G11C7/1039 , Y02D10/154
摘要： Methods and apparatus for use in a memory system having a non-volatile memory and a controller for limiting the number of non-volatile memory arrays from a plurality of available arrays accessed at one time are useful in the control of concurrent access of memory arrays. One method includes implementing a pipelining sequence for transferring data to and from the non-volatile memory arrays and limiting the number of active arrays operating at one time. The controller is configured to wait for the at least one of the arrays to complete before initiating a transfer to and from a further array.
摘要翻译： 在具有非易失性存储器的存储器系统中使用的方法和装置以及用于从一次访问的多个可用阵列限制非易失性存储器阵列的数量的控制器在对存储器阵列的并发访问的控制中是有用的。 一种方法包括实现用于将数据传送到非易失性存储器阵列和从非易失性存储器阵列传送数据的流水线序列，并限制一次操作的有源阵列的数量。 控制器被配置为等待至少一个数组完成，然后开始向另一阵列传送数据。
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公开(公告)号：US20110191530A1
公开(公告)日：2011-08-04
申请号：US13084396
申请日：2011-04-11
IPC分类号： G06F12/00
CPC分类号： G11C29/76 , G06F12/0246 , G06F2212/7201 , G06F2212/7208 , G11C29/808
摘要： The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.
摘要翻译： 本发明提出了用于将非易失性存储器的物理块链接到复合逻辑结构或“元区块”中的技术。 在确定好的物理块到元区块的初始链接之后，在非易失性存储器中维护链接的记录，在需要时可以容易地访问。 在一组实施例中，根据算法确定性地形成初始链接，并且可以根据存储器中的任何坏块的模式进行优化。 随着额外的坏块出现，链接被更新，通过替换与优质块链接的坏块，优选地与它们所替换的块相同的存储器子阵列来更新。
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公开(公告)号：US07945759B2
公开(公告)日：2011-05-17
申请号：US12248160
申请日：2008-10-09
IPC分类号： G06F12/16
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： In a memory with block management system, program failure in a block during a time-critical memory operation is handled by continuing the programming operation in a breakout block. Later, at a less critical time, the data recorded in the failed block prior to the interruption is transferred to another block, which could also be the breakout block. The failed block can then be discarded. In this way, when a defective block is encountered during programming, it can be handled without loss of data and without exceeding a specified time limit by having to transfer the stored data in the defective block on the spot. This error handling is especially critical for a garbage collection operation so that the entire operation need not be repeated on a fresh block during a critical time. Subsequently, at an opportune time, the data from the defective block can be salvaged by relocation to another block.
摘要翻译： 在具有块管理系统的存储器中，通过在分组块中继续编程操作来处理在时间紧急的存储器操作期间块中的程序故障。 之后，在不太关键的时刻，在中断之前记录在故障块中的数据被传送到另一个块，也可以是分组块。 然后可以丢弃失败的块。 以这种方式，当在编程期间遇到有缺陷的块时，可以在不丢失数据的情况下处理而不超过指定的时间限制，因为必须现场将存储的数据传送到缺陷块中。 这种错误处理对于垃圾收集操作尤其重要，因此在关键时刻不需要在新块上重复整个操作。 随后，在适当的时间，来自缺陷块的数据可以通过重新定位到另一个块来进行抢救。
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