Reducing polarization dependent loss caused by polarization dependent wavelength shift using core over-etch for planar lightwave circuit fabrication

    公开(公告)号:US06542687B2

    公开(公告)日:2003-04-01

    申请号:US09873068

    申请日:2001-05-31

    IPC分类号: G02B610

    摘要: A method of making a polarization insensitive optical waveguide structure. An optical core layer is formed on a substrate, wherein the optical core layer has a higher refractive index than the substrate. A mask is formed over the optical core layer. The unmasked areas of the optical core layer are then over-etched to define the core, wherein the over-etching removes the unmasked area of the optical core layer and a portion of the substrate disposed beneath the unmasked area, and defines the optical core. The mask is subsequently removed from the optical core. A cladding layer is then formed over the optical core and the substrate, the cladding layer having a lower refractive index than the optical core, to form a polarization insensitive optical waveguide structure. The amount of over-etching can be controlled to control an amount of substrate disposed beneath the unmasked area of the optical core layer that is removed. The amount of substrate removed, in turn, controls the polarization sensitivity of the optical waveguide structure. The amount of the portion of the substrate removed during the over-etching can be determined to minimize the polarization dependent wavelength shift and the polarization dependent loss of the optical waveguide structure. The amount of the portion of the substrate removed during the over-etching can be determined in accordance with a blanket stress of the cladding layer. The over-etching can be within a range between 7.5 percent and 30 percent.

    Array circuitry with conductive lines, contact leads, and storage
capacitor electrode all formed in layer that includes highly conductive
metal
    2.
    发明授权
    Array circuitry with conductive lines, contact leads, and storage capacitor electrode all formed in layer that includes highly conductive metal 失效
    具有导线,接触引线和存储电容器电极的阵列电路全部形成在包括高导电性金属的层中

    公开(公告)号:US5648674A

    公开(公告)日:1997-07-15

    申请号:US474845

    申请日:1995-06-07

    CPC分类号: H01L27/146 H01L31/022466

    摘要: A product such as an x-ray sensor array includes, for each unit of cell circuitry, a capacitor with upper and lower electrodes. A conductive layer that includes highly conductive metal such as aluminum is patterned to include the upper electrode of the capacitor, the contact leads of a switching element, and the data lines of the array. The upper electrode has an exposed area due to an opening in an insulating layer over it. A conductive element, such as an ITO island, is formed over the insulating layer, contacting the exposed area of the upper electrode so that the conductive element is electrically connected to one of the contact leads of the switching element through the upper electrode. The conductive elements of adjacent units can be separated by the minimum spacing necessary to ensure isolation. Or each unit's conductive element can be offset slightly from the data and scan lines and can also be pulled back from the channel of the switching element, which can be a TFT.

    摘要翻译: 对于每个单元电路单元,诸如x射线传感器阵列的产品包括具有上电极和下电极的电容器。 包括高导电性金属如铝的导电层被图形化以包括电容器的上电极,开关元件的接触引线和阵列的数据线。 上电极由于在其上的绝缘层中的开口而具有暴露区域。 导电元件例如ITO岛形成在绝缘层上,与上电极的暴露区域接触,使得导电元件通过上电极电连接到开关元件的接触引线之一。 相邻单元的导电元件可以分开所需的最小间隔以确保隔离。 或者每个单元的导电元件可以与数据和扫描线略微偏移,并且还可以从可以是TFT的开关元件的通道拉回。

    Separately etching insulating layer for contacts within array and for
peripheral pads
    3.
    发明授权
    Separately etching insulating layer for contacts within array and for peripheral pads 失效
    单独蚀刻阵列内和外围焊盘触点的绝缘层

    公开(公告)号:US5693567A

    公开(公告)日:1997-12-02

    申请号:US483404

    申请日:1995-06-07

    摘要: A process of producing a product such as an x-ray sensor array performs two etching operations on an insulating layer to expose different parts of a conductive layer. One etch exposes part of the conductive layer in each unit of cell circuitry in the array without exposing the contact pads at the array's periphery. Then, a conductive layer including ITO is deposited over the insulating layer and patterned to form a conductive element for each unit, with the conductive element contacting the exposed part of the conductive layer. Afterward, a second etch exposes contact pads at the periphery of the array. As a result, the contact pads have high quality surfaces, facilitating testing and wire bonding.

    摘要翻译: 制造诸如x射线传感器阵列的产品的过程在绝缘层上执行两次蚀刻操作以暴露导电层的不同部分。 一个蚀刻暴露阵列中单元电路的每个单元中的导电层的一部分,而不暴露阵列周边处的接触焊盘。 然后,在绝缘层上沉积包含ITO的导电层,并对其进行构图以形成每个单元的导电元件,导电元件与导电层的暴露部分接触。 之后,第二次蚀刻暴露阵列外围的接触焊盘。 因此,接触垫具有高质量的表面,便于测试和引线键合。