公开(公告)号：US20170104000A1

公开(公告)日：2017-04-13

申请号：US15291662

申请日：2016-10-12

申请人： Joo-Hee PARK ,  Jong-Min LEE ,  Seon-Kyung KIM ,  Kee-Jeong RHO ,  Jin-hyun SHIN ,  Jong-Hyun PARK ,  Jin-Yeon WON

发明人： Joo-Hee PARK ,  Jong-Min LEE ,  Seon-Kyung KIM ,  Kee-Jeong RHO ,  Jin-hyun SHIN ,  Jong-Hyun PARK ,  Jin-Yeon WON

IPC分类号： H01L27/115 ,  H01L23/528

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

摘要： A vertical memory device includes a substrate, a plurality of channels on the substrate and extending in a first direction that vertical to a top surface of the substrate, a plurality of gate lines and a conductive line on the substrate. The gate lines are stacked on top of each other. The gate lines surround the channels. The gate lines are spaced apart from each other along the first direction. The conductive line cuts the gate lines along the first direction. A width of the conductive line is periodically and repeatedly changed.