公开(公告)号：US07550383B2

公开(公告)日：2009-06-23

申请号：US11230957

申请日：2005-09-20

申请人： Joon-Soo Park ,  Gi-Sung Yeo ,  Han-Ku Cho ,  Sang-Gyun Woo ,  Tae-Young Kim ,  Byeong-Soo Kim

发明人： Joon-Soo Park ,  Gi-Sung Yeo ,  Han-Ku Cho ,  Sang-Gyun Woo ,  Tae-Young Kim ,  Byeong-Soo Kim

IPC分类号： H01L21/44 ,  H01L21/00

CPC分类号： G03F7/2022 ,  G03F1/70 ,  G03F7/203 ,  G03F7/70466 ,  G03F7/705

摘要： There are provided methods of performing a photolithography process for forming asymmetric semiconductor patterns and methods of forming a semiconductor device using the same. These methods provide a way of forming asymmetric semiconductor patterns on a photoresist layer through two exposure processes. To this end, a semiconductor substrate is prepared. A planarized insulating interlayer and a photoresist layer are sequentially formed on the overall surface of the semiconductor substrate. A first semiconductor pattern of a photolithography mask is transferred to the photoresist layer, thereby forming a photoresist pattern on the photoresist layer. A second semiconductor pattern of a second photolithography mask is continuously transferred to the photoresist layer, thereby forming a second photoresist pattern on the photoresist layer. An etching process is performed on the planarized insulating interlayer to expose the semiconductor substrate, using the first photoresist pattern and the second photoresist pattern as etch masks.

摘要翻译： 提供了用于形成不对称半导体图案的光刻工艺的方法和使用其形成半导体器件的方法。 这些方法提供了通过两个曝光工艺在光致抗蚀剂层上形成不对称半导体图案的方法。 为此，制备半导体衬底。 在半导体基板的整个表面上依次形成平坦化的绝缘中间层和光致抗蚀剂层。 将光刻掩模的第一半导体图案转印到光致抗蚀剂层，从而在光致抗蚀剂层上形成光致抗蚀剂图案。 第二光刻掩模的第二半导体图案被连续转印到光致抗蚀剂层，从而在光致抗蚀剂层上形成第二光致抗蚀剂图案。 在平坦化的绝缘中间层上进行蚀刻处理，以使用第一光致抗蚀剂图案和第二光致抗蚀剂图案作为蚀刻掩模来暴露半导体衬底。

公开(公告)号：US20060099538A1

公开(公告)日：2006-05-11

申请号：US11230957

申请日：2005-09-20

申请人： Joon-Soo Park ,  Gi-Sung Yeo ,  Han-Ku Cho ,  Sang-Gyun Woo ,  Tae-Young Kim ,  Byeong-Soo Kim

发明人： Joon-Soo Park ,  Gi-Sung Yeo ,  Han-Ku Cho ,  Sang-Gyun Woo ,  Tae-Young Kim ,  Byeong-Soo Kim

IPC分类号： G03F7/00

CPC分类号： G03F7/2022 ,  G03F1/70 ,  G03F7/203 ,  G03F7/70466 ,  G03F7/705

摘要： There are provided methods of performing a photolithography process for forming asymmetric semiconductor patterns and methods of forming a semiconductor device using the same. These methods provide a way of forming asymmetric semiconductor patterns on a photoresist layer through two exposure processes. To this end, a semiconductor substrate is prepared. A planarized insulating interlayer and a photoresist layer are sequentially formed on the overall surface of the semiconductor substrate. A first semiconductor pattern of a photolithography mask is transferred to the photoresist layer, thereby forming a photoresist pattern on the photoresist layer. A second semiconductor pattern of a second photolithography mask is continuously transferred to the photoresist layer, thereby forming a second photoresist pattern on the photoresist layer. An etching process is performed on the planarized insulating interlayer to expose the semiconductor substrate, using the first photoresist pattern and the second photoresist pattern as etch masks.

公开(公告)号：US20050173750A1

公开(公告)日：2005-08-11

申请号：US11049428

申请日：2005-02-02

申请人： Joon-Soo Park

发明人： Joon-Soo Park

IPC分类号： H01L27/108 ,  G11C7/00 ,  H01L21/8242

CPC分类号： H01L27/10885 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10888

摘要： Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an isolation layer in the substrate to define an active region, the isolation layer being parallel to the bit line without overlapping the bit line; and forming a gate line including a gate pattern and a conductive line by forming the gate pattern in the active region and forming a conductive line that extends at a right angle to the bit line across the active region and is electrically connected to the gate pattern disposed thereunder. The gate pattern and the conductive line can be integrally formed.

摘要翻译： 提供了具有改进的覆盖边缘的半导体器件及其制造方法。 一方面，一种方法包括在衬底中形成掩埋位线; 在所述衬底中形成隔离层以限定有源区，所述隔离层平行于所述位线而不重叠所述位线; 以及通过在所述有源区域中形成所述栅极图案形成包括栅极图案和导电线的栅极线，并形成在所述有源区域上与所述位线成直角延伸的导电线，并且电连接到所述栅极图案 在那里 栅极图案和导线可以一体形成。

公开(公告)号：US07879726B2

公开(公告)日：2011-02-01

申请号：US12187895

申请日：2008-08-07

申请人： Heung-Sik Park ,  Jun-Ho Yoon ,  Cheol-Kyu Lee ,  Joon-Soo Park

发明人： Heung-Sik Park ,  Jun-Ho Yoon ,  Cheol-Kyu Lee ,  Joon-Soo Park

IPC分类号： H01L21/311

CPC分类号： H01L21/3081 ,  H01L21/3065 ,  H01L29/4236 ,  H01L29/66621

摘要： A method of fabricating a semiconductor device is provided. The method can include forming a hard mask film including lower and upper hard mask films on a substrate in which an active region and an isolation region are defined and patterning the hard mask film to provide a hard mask pattern partially exposing the active region and the isolation region. An etchant can be applied to the active and isolation regions using the hard mask pattern as an etching mask to form a trench in the active region of the substrate while avoiding substantially etching the isolation region exposed to the etchant and a gate can be formed on the trench.

摘要翻译： 提供一种制造半导体器件的方法。 该方法可以包括在其上限定有源区和隔离区的衬底上形成包括下硬掩模膜和上硬掩模膜的硬掩模膜，并对硬掩模膜进行构图以提供部分暴露有源区的硬掩模图案和隔离 地区。 可以使用硬掩模图案作为蚀刻掩模将蚀刻剂施加到有源和隔离区域，以在衬底的有源区域中形成沟槽，同时避免基本上蚀刻暴露于蚀刻剂的隔离区域，并且可以在栅极上形成栅极 沟。

公开(公告)号：US07732279B2

公开(公告)日：2010-06-08

申请号：US12180250

申请日：2008-07-25

申请人： Joon-Soo Park

发明人： Joon-Soo Park

IPC分类号： H01L29/76 ,  H01L21/82

CPC分类号： H01L27/10885 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10888

摘要： Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an isolation layer in the substrate to define an active region, the isolation layer being parallel to the bit line without overlapping the bit line; and forming a gate line including a gate pattern and a conductive line by forming the gate pattern in the active region and forming a conductive line that extends at a right angle to the bit line across the active region and is electrically connected to the gate pattern disposed thereunder. The gate pattern and the conductive line can be integrally formed.

摘要翻译： 提供了具有改进的覆盖边缘的半导体器件及其制造方法。 一方面，一种方法包括在衬底中形成掩埋位线; 在所述衬底中形成隔离层以限定有源区，所述隔离层平行于所述位线而不重叠所述位线; 以及通过在所述有源区域中形成所述栅极图案形成包括栅极图案和导电线的栅极线，并形成在所述有源区域上与所述位线成直角延伸的导电线，并且电连接到所述栅极图案 在那里 栅极图案和导线可以一体形成。

公开(公告)号：US08034684B2

公开(公告)日：2011-10-11

申请号：US12769866

申请日：2010-04-29

申请人： Joon-Soo Park

发明人： Joon-Soo Park

IPC分类号： H01L29/76 ,  H01L21/336 ,  H01L21/82

CPC分类号： H01L27/10885 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10888

摘要： Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an isolation layer in the substrate to define an active region, the isolation layer being parallel to the bit line without overlapping the bit line; and forming a gate line including a gate pattern and a conductive line by forming the gate pattern in the active region and forming a conductive line that extends at a right angle to the bit line across the active region and is electrically connected to the gate pattern disposed thereunder. The gate pattern and the conductive line can be integrally formed.

摘要翻译： 提供了具有改进的覆盖边缘的半导体器件及其制造方法。 一方面，一种方法包括在衬底中形成掩埋位线; 在所述衬底中形成隔离层以限定有源区，所述隔离层平行于所述位线而不重叠所述位线; 以及通过在所述有源区域中形成所述栅极图案形成包括栅极图案和导电线的栅极线，并形成在所述有源区域上与所述位线成直角延伸的导电线，并且电连接到所述栅极图案 在那里 栅极图案和导线可以一体形成。

公开(公告)号：US20090042396A1

公开(公告)日：2009-02-12

申请号：US12187895

申请日：2008-08-07

申请人： Heung-Sik Park ,  Jun-Ho Yoon ,  Cheol-Kyu Lee ,  Joon-Soo Park

发明人： Heung-Sik Park ,  Jun-Ho Yoon ,  Cheol-Kyu Lee ,  Joon-Soo Park

IPC分类号： H01L21/311

CPC分类号： H01L21/3081 ,  H01L21/3065 ,  H01L29/4236 ,  H01L29/66621

摘要： A method of fabricating a semiconductor device is provided. The method can include forming a hard mask film including lower and upper hard mask films on a substrate in which an active region and an isolation region are defined and patterning the hard mask film to provide a hard mask pattern partially exposing the active region and the isolation region. An etchant can be applied to the active and isolation regions using the hard mask pattern as an etching mask to form a trench in the active region of the substrate while avoiding substantially etching the isolation region exposed to the etchant and a gate can be formed on the trench.

摘要翻译： 提供一种制造半导体器件的方法。 该方法可以包括在其上限定有源区和隔离区的衬底上形成包括下硬掩模膜和上硬掩模膜的硬掩模膜，并对硬掩模膜进行构图以提供部分暴露有源区的硬掩模图案和隔离 地区。 可以使用硬掩模图案作为蚀刻掩模将蚀刻剂施加到有源和隔离区域，以在衬底的有源区域中形成沟槽，同时避免基本上蚀刻暴露于蚀刻剂的隔离区域，并且可以在栅极上形成栅极 沟。

公开(公告)号：US07414279B2

公开(公告)日：2008-08-19

申请号：US11049428

申请日：2005-02-02

申请人： Joon-Soo Park

发明人： Joon-Soo Park

IPC分类号： H01L27/108

CPC分类号： H01L27/10885 ,  H01L27/10814 ,  H01L27/10876 ,  H01L27/10888

摘要： Semiconductor devices with an improved overlay margin and methods of manufacturing the same are provided. In one aspect, a method includes forming a buried bit line in a substrate; forming an isolation layer in the substrate to define an active region, the isolation layer being parallel to the bit line without overlapping the bit line; and forming a gate line including a gate pattern and a conductive line by forming the gate pattern in the active region and forming a conductive line that extends at a right angle to the bit line across the active region and is electrically connected to the gate pattern disposed thereunder. The gate pattern and the conductive line can be integrally formed.

摘要翻译： 提供了具有改进的覆盖边缘的半导体器件及其制造方法。 一方面，一种方法包括在衬底中形成掩埋位线; 在所述衬底中形成隔离层以限定有源区，所述隔离层平行于所述位线而不重叠所述位线; 以及通过在所述有源区中形成所述栅极图案形成包括栅极图案和导电线的栅极线，并且形成在所述有源区域上与所述位线成直角延伸的导电线，并且电连接到所述栅极图案 在那里 栅极图案和导线可以一体形成。

公开(公告)号：US06522351B1

公开(公告)日：2003-02-18

申请号：US08753883

申请日：1996-12-02

申请人： Joon-Soo Park

发明人： Joon-Soo Park

IPC分类号： H04N1304

CPC分类号： H04N13/139 ,  H04N13/161 ,  H04N13/194 ,  H04N13/239 ,  H04N13/363

摘要： A stereoscopic image display apparatus displays a stereoscopic image using only a single projector. The apparatus includes a photography section for sensing a left image and a right image of an object and converting the left and right images into respective first and second television signals. The first and second television signals are received by a receiving section which then provides the signals to a double-scanning section. The double-scanning section scans the left and right image signals received from the receiving section at a doubled horizontal scan frequency to produce a left double-scanned image signal and a right double-scanned image signal. A multiplexing section then alternately selects the left and right double-scanned image signals at a switching speed of the doubled horizontal frequency to thereby produce a single, multiplexed double-scanned image signal. A projection type display section projects the multiplexed double-scanned image signal onto a single display screen.

摘要翻译： 立体图像显示装置仅使用单个投影仪显示立体图像。 该装置包括用于感测物体的左图像和右图像的摄影部分，并将左图像和右图像转换成相应的第一和第二电视信号。 第一和第二电视信号由接收部分接收，接收部分然后将信号提供给双扫描部分。 双扫描部分以双倍的水平扫描频率扫描从接收部分接收的左和右图像信号，以产生左双扫描图像信号和右双扫描图像信号。 复用部分然后以双倍水平频率的切换速度交替地选择左和右双扫描图像信号，从而产生单个多路复用双扫描图像信号。 投影型显示部将多路复用的双扫描图像信号投影到单个显示画面上。