公开(公告)号：US07230313B2

公开(公告)日：2007-06-12

申请号：US10682323

申请日：2003-10-09

申请人： Joseph A. Yedinak ,  Dwayne S. Reichl ,  Bernard J. Czeck ,  Douglas J. Lange

发明人： Joseph A. Yedinak ,  Dwayne S. Reichl ,  Bernard J. Czeck ,  Douglas J. Lange

IPC分类号： H01L29/78

CPC分类号： H01L29/405 ,  H01L29/404 ,  H01L29/7395 ,  H01L29/7803

摘要： An integrated circuit includes a die having a device layer. An insulating layer is disposed over the device layer. A die street defines the outermost bounds of the die. A voltage divider network including a plurality of resistive elements derives a plurality of predetermined bias voltages. A field plate termination includes a plurality of field plates disposed on the oxide layer and are laterally spaced apart relative to each other and relative to the die street. Each of the plurality of field plates is electrically connected to a corresponding bias voltage. The bias voltage applied to a given field plate is determined by and increases with the proximity of that field plate relative to the die street.

摘要翻译： 集成电路包括具有器件层的管芯。 绝缘层设置在器件层上。 死街定义了模具的最外边界。 包括多个电阻元件的分压网络导出多个预定的偏置电压。 场板终端包括设置在氧化物层上并相对于彼此和相对于模具街道横向间隔开的多个场板。 多个场板中的每一个电连接到相应的偏置电压。 施加到给定场板的偏置电压由该场板相对于模具街道的接近度确定并随其增加。

公开(公告)号：US06798019B2

公开(公告)日：2004-09-28

申请号：US10055211

申请日：2002-01-23

申请人： Joseph A. Yedinak ,  Dwayne S. Reichl ,  Jack E. Wojslawowicz ,  Bernard J. Czeck ,  Robert D. Baran ,  Douglas Lange

发明人： Joseph A. Yedinak ,  Dwayne S. Reichl ,  Jack E. Wojslawowicz ,  Bernard J. Czeck ,  Robert D. Baran ,  Douglas Lange

IPC分类号： H01L2973

CPC分类号： H01L29/0696 ,  H01L29/1033 ,  H01L29/1037 ,  H01L29/7395 ,  H01L29/7397

摘要： An IGBT has striped cell with source stripes 2a, 2b continuous or segmented along the length of the base stripe 3. The opposite stripes are periodically connected together by the N+ contact regions 20 to provide channel resistance along the width of the source stripes 2a, 2b. For continuous stripes the resistance between two sequential contact areas 20a, 20b is greatest in the middle and current concentrates near the source contact regions 20. The wider the spacing between the contacts 20, the larger the resistive drop to the midpoint between two N+ contacts 20.

摘要翻译： IGBT具有沿着基带3的长度连续或分段的源极条2a，2b的条纹单元。相反的条由N +接触区域20周期性地连接在一起，以沿着源极条2a，2b的宽度提供沟道电阻 。 对于连续条纹，两个顺序接触区域20a，20b之间的电阻在中间是最大的，并且电流集中在源极接触区域20附近。触点20之间的间隔越宽，两个N +触点20之间的中点的电阻降低越大 。

公开(公告)号：US06777747B2

公开(公告)日：2004-08-17

申请号：US10050976

申请日：2002-01-18

申请人： Joseph A. Yedinak ,  Jack E. Wojslawowicz ,  Bernard J. Czeck ,  Robert D. Baran ,  Douglas Lange

发明人： Joseph A. Yedinak ,  Jack E. Wojslawowicz ,  Bernard J. Czeck ,  Robert D. Baran ,  Douglas Lange

IPC分类号： H01L2976

CPC分类号： H01L29/7397 ,  H01L29/0834 ,  H01L29/36 ,  H01L29/7395

摘要： An IGBT has a thick buffer region with increased doping to improve self-clamped inductive switching and device manufacture. A planar or trench gate IGBT has a buffer layer more than 25 microns thick. The buffer layer is doped high enough so that its carriers are more numerous than minority carriers, particularly at the transition between the N buffer & N drift region.

摘要翻译： IGBT具有增加掺杂的厚缓冲区，以改善自感感开关和器件制造。 平面或沟槽栅极IGBT具有超过25微米厚的缓冲层。 缓冲层被掺杂得足够高，使得其载流子比少数载流子更多，特别是在N缓冲区和N漂移区之间的转变。