-
公开(公告)号：US4743864A
公开(公告)日：1988-05-10
申请号：US922300
申请日：1986-10-23
CPC分类号： H03L7/14 , H03L7/0802 , H03L7/104 , H03L7/199 , H03L2207/08 , Y10T307/273 , Y10T307/297 , Y10T307/359 , Y10T307/375
摘要： In an intermittently operative phase-locked loop, in order to prevent the oscillator frequency from significantly changing at the time of turning on of an electric power source, a point in time at which a phase difference between clock signals respectively fed to a reference frequency divider and to a frequency divider for dividing the output frequency of a voltage-controlled oscillator becomes substantially zero is detected, and the two frequency dividers are initialized when the above-mentioned point in time is detected after turning on of the electric power source.
摘要翻译： 在间歇操作的锁相环中，为了防止在电源接通时振荡器频率显着变化的时间点，分别馈送到参考分频器的时钟信号之间的相位差 并且检测到用于分压电压控制振荡器的输出频率的分频器变得基本为零，并且当在电源接通之后检测到上述时间点时，两个分频器被初始化。
-
公开(公告)号：US4751469A
公开(公告)日：1988-06-14
申请号：US52968
申请日：1987-05-22
CPC分类号： G01R25/005 , H03L7/095 , H03L7/089
摘要： This invention relates to a phase coincidence detector for examining whether or not two input digital signals are coincident by utilizing a delay signal and an advance signal of a digital phase comparator which examines the phase difference between the two input digital signals and outputs the delay signal representing the delay of one of the input signals to the other and the advance signal representing the advance of one of the input signals to the other. Particularly, the output signals of the phase comparator, that is, the delay signal and the advance signal, are periodic pulse signals, and residual pulses having a small pulse width occur periodically even at the time of coincidence. The phase coincidence detector of this invention changes the delay and advance signals by a pulse width discrimination circuit for discriminating whether or not the phase difference between the two input signals is below a certain constant value, and samples the changed signals to output the in-phase and out-of-phase state as signals having different levels.
摘要翻译： 本发明涉及一种相位一致检测器，用于通过利用数字相位比较器的延迟信号和提前信号检查两个输入数字信号是否一致，数字相位比较器检查两个输入数字信号之间的相位差，并输出表示 将输入信号中的一个延迟到另一个的输入信号和表示其中一个输入信号的提前信号的延迟。 特别地，相位比较器的输出信号，即延迟信号和提前信号是周期脉冲信号，即使在重合时也会周期性地出现具有小脉冲宽度的残留脉冲。 本发明的相位一致检测器通过脉冲宽度鉴别电路来改变延迟和提前信号，用于鉴别两个输入信号之间的相位差是否低于一定的常数值，并对改变的信号进行采样以同相输出 和异相状态作为具有不同电平的信号。
-
3.发明授权Monostable multivibrator and FM detector circuit employing common emitter transistor amplifier with plural emitter resistors to avoid circuit operation from signal noise 失效采用具有多个发射极电阻的公共发射极晶体管放大器的Monostable多谐振荡器和FM检波器电路，以避免信号噪声的电路运行
公开(公告)号：US4282448A
公开(公告)日：1981-08-04
申请号：US969085
申请日：1978-12-13
摘要： This invention discloses a monostable multivibrator which is useful for an FM detector circuit of a pulse count system. The monostable multivibrator has a time constant circuit which includes a capacitor, an amplifier circuit which receives an output of the time constant circuit, a positive feedback circuit which is connected between an output end of the amplifier circuit and an input end of the time constant circuit, and a trigger terminal which is disposed in a circuit loop constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit; and is characterized in that the amplifier circuit is a differential amplifier which is made up of a pair of transistors connected in the differential form, the transistors being connected in common through emitter resistances connected in series with respective emitters thereof. Thus, the monostable multivibrator can provide pulse signals of a fixed pulse width without being influenced by noise.
摘要翻译： 本发明公开了一种可用于脉冲计数系统的FM检测器电路的单稳态多谐振荡器。 单稳态多谐振荡器具有时间常数电路，其包括电容器，接收时间常数电路的输出的放大器电路，连接在放大器电路的输出端和时间常数电路的输入端之间的正反馈电路 以及设置在由时间常数电路，放大电路和正反馈电路构成的电路回路中的触发端子; 并且其特征在于放大电路是由以差分形式连接的一对晶体管构成的差分放大器，晶体管通过与其各自的发射极串联连接的发射极电阻共同连接。 因此，单稳态多谐振荡器可以提供固定脉冲宽度的脉冲信号，而不受噪声的影响。
-
4.发明授权Monostable multivibrator circuit with clamped non-saturating common emitter amplifier in feedback path 失效单稳态多谐振荡器电路，在反馈路径中具有钳位非饱和公共发射极放大器
公开(公告)号：US4277703A
公开(公告)日：1981-07-07
申请号：US2108
申请日：1979-01-09
CPC分类号： H03K3/023
摘要： This invention relates to a monostable multivibrator which is operated in the non-saturated state. The monostable multivibrator circuit includes a time constant circuit which has a capacitor, an amplifier circuit which receives an output signal of the time constant circuit, a positive feedback circuit which is connected between an output end of the amplifier circuit and an input end of the time constant circuit, and a trigger terminal which is disposed in a circuit loop constructed of the time constant circuit, the amplifier circuit and the positive feedback circuit; and it is characterized in that the positive feedback circuit comprises a signal amplifying transistor which has a base receiving an output of the amplifier circuit and a collector supplying a signal to the time constant circuit, and a level clamp circuit which is coupled to the collector of the transistor in order to hold a collector output potential of the transistor higher than a base input potential thereof.
摘要翻译： 本发明涉及在非饱和状态下工作的单稳态多谐振荡器。 单稳态多谐振荡器电路包括具有电容器的时间常数电路，接收时间常数电路的输出信号的放大器电路，连接在放大器电路的输出端和时间常数电路的输入端之间的正反馈电路 恒定电路和触发端子，其设置在由时间常数电路，放大器电路和正反馈电路构成的电路回路中; 其特征在于，正反馈电路包括信号放大晶体管，其具有接收放大器电路的输出的基极和向时间常数电路提供信号的集电极，以及电平钳位电路，其耦合到 该晶体管为了保持晶体管的集电极输出电位高于其基极输入电位。
-
5.发明授权Circuit for preventing output clipping of R.F. stage in radio receiver 失效用于防止R.F.的输出限幅的电路 无线电接收机的舞台
公开(公告)号：US4030035A
公开(公告)日：1977-06-14
申请号：US617638
申请日：1975-09-29
申请人： Masanori Ienaka , Yasuo Kominami , Yukio Suzuki , Masami Kawamura
发明人： Masanori Ienaka , Yasuo Kominami , Yukio Suzuki , Masami Kawamura
CPC分类号： H03G3/3068
摘要： In a receiver comprising a radio frequency amplifier stage, a frequency converter stage, an intermediate frequency amplifier stage and a detector, so that the gains of the radio frequency amplifier stage and the intermediate frequency amplifier stage are automatically controlled by an AGC voltage derived from the detector, the improvement further comprising a voltage comparator which compares a signal amplitude value of the radio frequency amplifier stage and a predetermined reference value and which provides a detection output signal when the former value becomes greater than the latter value, the gain of the radio frequency amplifier stage being reduced by the detection output signal so as to prevent the output clipping of the radio frequency amplifier stage.
摘要翻译： 在包括射频放大器级，频率转换器级，中频放大器级和检测器的接收器中，使得射频放大器级和中频放大级的增益由源自 所述改进还包括电压比较器，其比较所述射频放大器级的信号幅度值和预定参考值，并且当所述前一值变得大于后一值时提供检测输出信号，所述射频增益 放大器级被检测输出信号减小，以防止射频放大器级的输出限幅。
-
公开(公告)号：US4362998A
公开(公告)日：1982-12-07
申请号：US7981
申请日：1979-01-31
申请人： Kazuo Watanabe , Masanori Ienaka , Yasuo Kominami , Makoto Homma
发明人： Kazuo Watanabe , Masanori Ienaka , Yasuo Kominami , Makoto Homma
CPC分类号： H03D3/22 , H03D3/14 , H03D1/229 , H03D13/008 , H03D2200/0009 , H03D2200/0049
摘要： An FM detector is constructed of a phase shift network and an analog multiplier. The analog multiplier includes a differential amplifier circuit and a phase detector circuit. The differential amplifier circuit includes differential pair transistors which are driven by FM intermediate frequency signals. One of the differential pair transistors has another transistor connected thereto which is also driven by the FM intermediate frequency signal. A collector signal of either one of the differential pair transistors is applied to the phase detector circuit through the phase shift network, while a collector signal of the other transistor is directly applied to the phase detector circuit. An emitter of the one transistor and an emitter of the other transistor are connected through resistors, whereby the signal-to-noise ratio of the FM detector is improved.
摘要翻译： FM检波器由相移网络和模拟乘法器构成。 模拟乘法器包括差分放大器电路和相位检测器电路。 差分放大器电路包括由FM中频信号驱动的差分对晶体管。 差分对晶体管中的一个具有连接到其上的另一个晶体管，其也由FM中频信号驱动。 差分对晶体管中的任一个的集电极信号通过相移网络施加到相位检测器电路，而另一个晶体管的集电极信号被直接施加到相位检测器电路。 一个晶体管的发射极和另一个晶体管的发射极通过电阻连接，从而提高了FM检测器的信噪比。
-
公开(公告)号：US4139738A
公开(公告)日：1979-02-13
申请号：US831520
申请日：1977-09-08
申请人： Masanori Ienaka , Yasuo Kominami
发明人： Masanori Ienaka , Yasuo Kominami
CPC分类号： H03D1/2227
摘要： In a multiplex decoder circuit comprising two pairs of transistor differential circuits driven by switching signals of a 38 kHz subcarrier signal, for separating a stereo composite signal into left and right channel signals, a differential amplifier formed of a pair of transistors connected to the respective differential circuits for amplifying and injecting the composite signal, and a constant current source, at least one of the pair of differential transistor amplifiers being supplied with the composite signal is formed of a negative feedback amplifier to suppress the output distortion of the transistor amplifier due to variations in the emitter resistance of the transistor amplifier with respect to the variations of the input stereo composite signal. As a result, the waveform distortion of the separated left and right channel signals is reduced.
摘要翻译： 在包括由38kHz副载波信号的切换信号驱动的两对晶体管差分电路的多路解码器电路中，用于将立体声合成信号分离成左右声道信号，由连接到相应差分的一对晶体管形成的差分放大器 用于放大和注入复合信号的电路以及恒流源，提供复合信号的一对差分晶体管放大器中的至少一个由负反馈放大器形成，以抑制由于变化引起的晶体管放大器的输出失真 在晶体管放大器的发射极电阻相对于输入立体声复合信号的变化。 结果，分离的左右声道信号的波形失真减小。
-
公开(公告)号：US4037056A
公开(公告)日：1977-07-19
申请号：US646756
申请日：1976-01-06
申请人： Masanori Ienaka , Yukio Suzuki
发明人： Masanori Ienaka , Yukio Suzuki
CPC分类号： H04H40/45 , H03D1/2227
摘要： An FM multiplex demodulator circuit comprises, within a semiconductor integrated circuit, a double balance type synchronous detection circuit which includes load elements formed within the semiconductor integrated circuit, a pair of negative feedback type differential amplifier circuits which amplify a pair of detection outputs from the detection circuit and also perform de-emphasis thereof, respectively, and a pair of emitter follower circuits which are connected to outputs of the negative feedback type differential amplifier circuits, respectively.
摘要翻译： FM多路解调器电路在半导体集成电路内包括双平衡型同步检测电路，其包括形成在半导体集成电路内的负载元件，一对负反馈型差分放大器电路，用于放大来自检测的一对检测输出 并分别进行去加重，以及分别连接到负反馈型差分放大器电路的输出的一对射极跟随器电路。
-
公开(公告)号：US4398060A
公开(公告)日：1983-08-09
申请号：US290564
申请日：1981-08-06
申请人： Masanori Ienaka , Yoshimi Iso
发明人： Masanori Ienaka , Yoshimi Iso
摘要： Signal transmitting operation is effected in a muting circuit when a first constant current source connected to the emitters of first and second transistors is operative with a second constant current source connected to the emitters of third and fourth transistors being inoperative. The signal transmitting operation is not effected in the opposite case. A bias resistor is interposed between the bases of the first and third transistors. To eliminate the popping noise when the power source is turned on, a switching element is connected parallel to the bias resistor and is kept in the ON state for a predetermined period of time after making of the power source.In an FM radio receiver, the output signal of a detuning detection circuit is applied to the input terminals of first and second mute control circuits, and the muting operation of a pre-amplifier for amplifying a stereo composite signal is controlling by the first mute control circuit while the muting operation of a muting circuit connected to the output of a stereo demodulation circuit is controlled by the second mute control circuit. Discrimination levels of these first and second mute control circuits are set to mutually different levels to eliminate occurrence of the popping noise at the time of changes from tuning to detuning and vice versa.
摘要翻译： 当连接到第一和第二晶体管的发射极的第一恒流源与连接到第三和第四晶体管的发射极不工作的第二恒流源工作时，在静音电路中实现信号发射操作。 在相反的情况下，信号发送操作不受影响。 偏置电阻器插在第一和第三晶体管的基极之间。 为了消除电源接通时的突发噪声，开关元件并联连接到偏置电阻器，并且在制作电源之后保持在ON状态一段预定的时间。 在FM无线电接收机中，失谐检测电路的输出信号被施加到第一和第二静音控制电路的输入端，并且用于放大立体声复合信号的前置放大器的静音操作由第一静音控制 而连接到立体声解调电路的输出的静音电路的静音操作由第二静音控制电路控制。 这些第一静音控制电路和第二静音控制电路的识别电平被设置为相互不同的电平，以消除在从调谐到失谐的时刻出现爆音噪声，反之亦然。
-
公开(公告)号：US4356350A
公开(公告)日：1982-10-26
申请号：US162087
申请日：1980-06-23
申请人： Masanori Ienaka
发明人： Masanori Ienaka
CPC分类号： H04H40/72 , H03G3/3005 , H04B1/1676
摘要： Stereo composite signals and 38 KHz sub-carrier switching signal are fed to a stereo demodulator. The 38 KHz sub-carrier switching signal is generated from the phase-lock loop circuit and is transmitted to the stereo demodulator circuit via a gain-controlled circuit.The output of an FM detector is applied to a high-pass filter which works to take out undesirable high-frequency components that are contained in the FM detection outputs. The level of the high-frequency components is detected by a detector.The output signal of the detector is applied to the gain-controlled circuit to control the gain of the gain-controlled circuit. When the level of undesirable high-frequency components obtained by the high-pass filter increases, the gain of the gain-controlled circuit is decreased, whereby the amplitude level of 38 KHz sub-carrier switching signal transmitted to the stereo demodulator is lowered.Thus, it is possible to suppress the development of beat signals of audible frequencies, due to the interference between undesirable high-frequency components contained in the outputs of the FM detector and harmonic components in the 38 KHz sub-carrier signals.
摘要翻译： 立体声复合信号和38KHz副载波切换信号被馈送到立体声解调器。 38KHz副载波切换信号由锁相环电路产生，经由增益控制电路发送到立体声解调电路。 FM检测器的输出被施加到高通滤波器，该高通滤波器用于取出包含在FM检测输出中的不期望的高频分量。 高频分量的电平由检测器检测。 检测器的输出信号被施加到增益控制电路以控制增益控制电路的增益。 当由高通滤波器获得的不期望的高频分量的电平增加时，增益控制电路的增益减小，从而传输到立体声解调器的38KHz副载波切换信号的振幅电平降低。 因此，由于FM检波器的输出中包含的不希望有的高频分量与38KHz副载波信号中的谐波分量之间的干扰，可以抑制可听频率的拍频信号的发展。
-
-
-
-
-
-
-
-
-
搜索结果
18 条记录 (耗时 0.02 秒)