公开(公告)号：US20190342682A1

公开(公告)日：2019-11-07

申请号：US16517115

申请日：2019-07-19

申请人： Ronald Quan

发明人： Ronald Quan

IPC分类号： H04R29/00 ,  H04R3/04 ,  H03G11/08 ,  G10L21/0264 ,  G01R23/20

摘要： A system is provided to analyze cross-modulation distortion in audio devices, which may include testing with audio frequencies. One or more distortion signals from the audio device may be measured for an amplitude, phase, and or frequency modulation effect. In another embodiment a musical signal may be used as a test signal. Providing additional test signals to the audio device can induce a time varying cross-modulation distortion signal from an output of the audio device. Also utilizing at least one additional filter, filter bank, demodulator and or frequency converter and or frequency multiplier provides extra examination of distortion. Also frequency and or phase response can be measured with the presence of a de-sensing signal and or another signal that induce near slew rate limiting or near overload condition of the device under test.

公开(公告)号：US20190229694A1

公开(公告)日：2019-07-25

申请号：US16371102

申请日：2019-03-31

申请人： Ronald Quan

发明人： Ronald Quan

IPC分类号： H03G11/08 ,  H04R29/00 ,  H03G3/30

CPC分类号： H03G11/08 ,  H03G3/3005 ,  H04R29/001

摘要： A system is provided to analyze cross-modulation distortion in audio devices, which may include testing with audio frequencies. One or more distortion signals from the audio device may be measured for an amplitude, phase, and or frequency modulation effect. In another embodiment a musical signal may be used as a test signal. Providing additional test signals to the audio device can induce a time varying cross-modulation distortion signal from an output of the audio device. Also utilizing at least one additional filter, filter bank, demodulator and or frequency converter and or frequency multiplier provides extra examination of distortion. Also frequency and or phase response can be measured with the presence of a de-sensing signal and or another signal that induce near slew rate limiting or near overload condition of the device under test.

公开(公告)号：US09948262B2

公开(公告)日：2018-04-17

申请号：US15482543

申请日：2017-04-07

申请人： Andrew Wireless Systems GmbH

发明人： Udo-Michael Vetter

IPC分类号： H03G3/20 ,  H03G11/08 ,  H03G11/04 ,  H03F1/02

CPC分类号： H03G11/08 ,  H03F1/0222 ,  H03F1/0227 ,  H03F1/0244 ,  H03F1/025 ,  H03F2200/105 ,  H03F2200/465 ,  H03G11/04

摘要： In one embodiment, a signal-processing apparatus for generating an amplified output signal based on an input signal is provided. The apparatus comprises: an amplifier configured to generate the output signal, wherein the amplifier is configured to receive a supply voltage; and a limiter configured to inhibit increases in the input signal power level from being applied to the amplifier, wherein the limiter comprises: a variable attenuator configured to selectively attenuate the input signal before being applied to the amplifier; wherein the limiter integrates over a voltage difference between a current measure of attenuated input signal power level and a limiter threshold level to control a level of attenuation applied by the variable attenuator to the input signal.

公开(公告)号：US20050286550A1

公开(公告)日：2005-12-29

申请号：US11146300

申请日：2005-06-06

申请人： Peter Caldera ,  Thomas Ferianz

发明人： Peter Caldera ,  Thomas Ferianz

IPC分类号： G11C7/10 ,  H02H9/02 ,  H02H9/04 ,  H03G11/04 ,  H03G11/08 ,  H04B3/02 ,  H04L12/66 ,  H04M3/00

CPC分类号： G11C7/1051 ,  G11C7/1057 ,  G11C7/1069 ,  G11C7/1078 ,  G11C7/1084 ,  G11C7/1096

摘要： The invention provides a transmission apparatus for line signals (206a, 206b) having a line device (201) for transmitting the line signals (206a, 206b) at prescribed signal levels and having a line driver device (100) which has an amplifier unit (101) and a control unit (105). A determination unit (102) is used to change over the operating mode of the amplifier unit (101) when a signal level for the line signals (206a, 206b) exceeds a prescribed reference level (113a, 113b) by virtue of a determination unit (102) having established that a prescribed reference signal level (113a, 113b) has been exceeded by the signal level of the line signals (206a, 206b).

摘要翻译： 本发明提供了一种线路信号（206a，206b）的发送装置，具有线路装置（201），用于以规定的信号电平发送线路信号（206a，206b）并具有线路驱动装置（100） 放大器单元（101）和控制单元（105）。 当线路信号（206a，206b）的信号电平超过规定的参考电平（113a，113b）时，确定单元（102）用于改变放大器单元（101）的工作模式， 确定单元（102）已确定已经超过了行信号（206a，206b）的信号电平的规定参考信号电平（113a，113b）。

公开(公告)号：US5880618A

公开(公告)日：1999-03-09

申请号：US942838

申请日：1997-10-02

申请人： Myron J. Koen

发明人： Myron J. Koen

IPC分类号： G06F7/556 ,  H03G1/00 ,  H03G7/00 ,  H03G11/08 ,  H03H7/24 ,  H03H11/24

CPC分类号： H03H7/25 ,  H03G1/007 ,  H03G1/0088 ,  H03G7/00 ,  H03H11/245

摘要： A logarithmic attenuator circuit includes a resistive attenuator in which the series resistors are P-channel MOSFETs with gate electrodes connected to V.sub.DD and the parallel resistors are P-channel MOSFETs which also function as switches. A control circuit (8B) produces a plurality of successive control signals (V1,2 . . . 10) on the gate electrodes of the successive MOSFETs which functions as switches in response to a gain control signal (V.sub.GC)

摘要翻译： 对数衰减器电路包括电阻衰减器，其中串联电阻是P沟道MOSFET，其栅电极连接到VDD，并联电阻是也用作开关的P沟道MOSFET。 控制电路（8B）在连续MOSFET的栅电极上产生多个连续的控制信号（V1,2.10），其响应于增益控制信号（VGC）而用作开关，

公开(公告)号：US5877645A

公开(公告)日：1999-03-02

申请号：US908573

申请日：1997-08-08

申请人： Vittorio Comino ,  Dima David Shulman ,  Susan Jeanne Walker

发明人： Vittorio Comino ,  Dima David Shulman ,  Susan Jeanne Walker

IPC分类号： G06G7/24 ,  H03G7/00 ,  H03G11/08 ,  H03L5/00

CPC分类号： H03G7/00 ,  G06G7/24

摘要： A circuit for compensating for the input offset voltage of a logarithmic amplifier includes a digital comparator, a logic circuit, and a digital-to-analog converter (DAC) in a feedback loop. The comparator is connected to the output of the log amplifier and digitally indicates the polarity of the input offset voltage when the amplifier input is set to zero. The logic circuit uses the digital output of the comparator to form an adjustable digital compensation signal. This digital compensation signal is applied to the DAC to generate an analog compensation signal that is injected into the input of the logarithmic amplifier to cancel the input offset voltage. The process is repeated until the proper or best compensation signal is produced.

摘要翻译： 用于补偿对数放大器的输入失调电压的电路包括数字比较器，逻辑电路和反馈回路中的数模转换器（DAC）。 比较器连接到对数放大器的输出，当放大器输入设置为零时，数字地表示输入失调电压的极性。 逻辑电路使用比较器的数字输出形成可调数字补偿信号。 该数字补偿信号被施加到DAC以产生模拟补偿信号，该信号被注入到对数放大器的输入端以消除输入失调电压。 重复该过程，直到产生适当或最佳的补偿信号。

公开(公告)号：US5818279A

公开(公告)日：1998-10-06

申请号：US812190

申请日：1997-03-06

申请人： Burkhard Dick

发明人： Burkhard Dick

IPC分类号： H03G11/08 ,  G06G7/24 ,  H03F3/45 ,  H03G7/00

CPC分类号： H03G7/001 ,  G06G7/24

摘要： A circuit arrangement having a logarithmic transfer function between an input signal and an output signal in a predefined level range of the input signal circuit which has a very low power consumption and low circuit complexity, includes a first pair of amplifier elements, namely transistors, forming a first differential amplifier and a second pair of amplifier elements, namely transistors, forming a second differential amplifier. The first pair of transistors have their emitters connected to each other and to a first current source, their collectors connected to working impedances subdivided by respective taps, and their bases receive the input signal between them. The second pair of transistors have their emitters connected to each other and to a second current source, their collectors connected to the collectors of the first pair of transistors, respectively, and their bases cross-connected to the taps of the working impedances. A rectifier stage has inputs connected to the collectors of the first and second pairs of transistors and an output at which the output signal is formed.

摘要翻译： 具有在输入信号和输入信号电路的预定义电平范围内的具有非常低的功耗和低电路复杂度的输出信号之间的对数传递函数的电路装置包括第一对放大器元件，即晶体管，形成 第一差分放大器和第二对放大器元件，即形成第二差分放大器的晶体管。 第一对晶体管的发射极彼此连接并连接到第一电流源，它们的集电极连接到由各个抽头细分的工作阻抗，它们的基极在它们之间接收输入信号。 第二对晶体管的发射极彼此连接并连接到第二电流源，它们的集电极分别连接到第一对晶体管的集电极，并且它们的基极交叉连接到工作阻抗的抽头。 整流器级具有连接到第一和第二对晶体管的集电极的输入端和形成输出信号的输出端。

公开(公告)号：US5631594A

公开(公告)日：1997-05-20

申请号：US629197

申请日：1996-04-08

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： H03G11/08 ,  G06G7/24 ,  H03F3/45 ,  H03G7/00 ,  G06F7/556

CPC分类号： H03G7/001 ,  G06G7/24

摘要： A logarithmic amplifier circuit including a first triple-tail cell for rectifying an initial input signal to produce a first rectified output signal and a first amplified output signal, a second triple-tail cell for rectifying the first amplified output signal of the first triple-tail cell to produce a second rectified output signal and a second amplified output signal; and an adder for adding the first rectified output signal and the second rectified output signal. Each of the first and second triple-tail cells has first, second and third transistors whose emitters or sources are coupled together, said first and second transistors forming a differential pair. The differential pair and third transistor are driven by a single tail current. A base or gate of the third transistor are applied with ad c tuning voltage. Reduction of the circuit scale and total current consumption, low-voltage operation, and the logarithmic characteristics tuning can be realized.

摘要翻译： 一种对数放大器电路，包括用于整流初始输入信号以产生第一整流输出信号和第一放大输出信号的第一三尾单元，用于整流第一三尾尾的第一放大输出信号的第二三尾单元 以产生第二整流输出信号和第二放大输出信号; 以及用于将第一整流输出信号和第二整流输出信号相加的加法器。 第一和第二三尾单元中的每一个具有其发射器或源耦合在一起的第一，第二和第三晶体管，所述第一和第二晶体管形成差分对。 差分对和第三晶体管由单尾电流驱动。 第三晶体管的基极或栅极被施加广告调谐电压。 可以实现电路规模的降低和总电流消耗，低电压操作以及对数特性调谐的降低。

公开(公告)号：US5561392A

公开(公告)日：1996-10-01

申请号：US102493

申请日：1993-08-05

申请人： Katsuji Kimura

发明人： Katsuji Kimura

IPC分类号： G06G7/24 ,  H03G7/00 ,  H03G7/06 ,  H03G11/08 ,  G06F7/556 ,  G06G7/12

CPC分类号： H03G7/001 ,  H03G7/06

摘要： A logarithmic amplification circuit is provided which is composed of a differential amplifier, a plurality of full-wave rectifiers including two half-wave rectifiers connected so as to have their input signals inverse in phase to each other and respectively receiving an output signal of the differential amplifier, and an adder for adding the output signals of the full-wave rectifier. Each of the half-wave rectifiers includes a differential transistor pair only one of which has an emitter resistor. Two sets of such differential transistor pair are arranged so that the collectors of transistors with emitter resistors are connected, the collectors of transistors without emitter resistors are connected, an output signal of the differential amplifier is applied to the base of one of the transistors having an emitter resistor and one of the transistors not having an emitter resistor, another output signal of the differential amplifier is applied to the base of the other of the transistors having an emitter resistor and the other of the transistors not having an emitter resistor, and the transistors of each pair are connected, respectively, to constant current sources.

摘要翻译： 提供了一种对数放大电路，它由差分放大器组成，多个全波整流器包括两个半波整流器，它们连接成使它们的输入信号彼此相位相反，分别接收差分输出信号 放大器和用于相加全波整流器的输出信号的加法器。 每个半波整流器包括一个差分晶体管对，其中仅一个具有发射极电阻。 布置两组这样的差分晶体管对，使得具有发射极电阻的晶体管的集电极连接，没有发射极电阻的晶体管的集电极被连接，差分放大器的输出信号被施加到具有 发射极电阻器和不具有发射极电阻器的晶体管之一，差分放大器的另一个输出信号被施加到具有发射极电阻器的另一个晶体管的基极，而另一个晶体管没有发射极电阻器，晶体管 分别连接到恒定电流源。

公开(公告)号：US5537071A

公开(公告)日：1996-07-16

申请号：US342981

申请日：1994-11-21

申请人： Cornelis A. M. Jaspers

发明人： Cornelis A. M. Jaspers

IPC分类号： H03G11/08 ,  H04N5/20 ,  G06F7/556

CPC分类号： H04N5/20

摘要： A non-linear circuit having a transfer characteristic which is adjustable per amplitude segment of an input signal (Yi) includes a segmenting circuit (11 . . . 15, 21 . . . 25) for obtaining a plurality of amplitude segment signals (Y1 . . . Y5) from the input signal (Yi), and a non-linear segment amplifier circuit (31 . . . 35) coupled to the segmenting circuit (11 . . . 15, 21 . . . 25) for separately multiplying segments (Y1 . . . Y5) of the input signal (Yi) by respective segment gain factors (HM1 . . . HM5) in dependence upon a common gain factor (HMa) derived from the segment gain factors (HM1 . . . HM5) and on the basis of the amplitude segment signals (Y1 . . . Y5) for supplying a signal (Y"s) which is adjustable per amplitude segment of the input signal (Yi). The non-linear circuit may also include an output circuit (37, 39) coupled to the non-linear segment amplifier circuit (31 . . . 35) for supplying an amplified output signal (Yhm), the amplification of which, with respect to the input signal (Yi), being adjustable per amplitude segment of the input signal (Yi).

摘要翻译： 具有对于输入信号（Yi）的每个幅度段可调节的传送特性的非线性电路包括用于获得多个幅度段信号（Y1）的分段电路（11 ... 15,21,25）。 ...，Y5）和耦合到分段电路（11 ... 15,21 ... 25）的非线性段放大器电路（31 ... 35），用于分别乘以段（ 根据从段增益因子（HM1 ... HM5）导出的公共增益因子（HMa）和相应的段增益因子（HM1 ... HM5），输入信号（Y 1）的输入信号（Y 1） 用于提供对于输入信号（Yi）的每个幅度段可调节的信号（Y'）的振幅分段信号（Y1 ... Y5）的基础。 非线性电路还可以包括耦合到非线性段放大器电路（31.35）的输出电路（37,39），用于提供放大的输出信号（Yhm），放大的输出信号相对于 输入信号（Yi），可根据输入信号（Yi）的幅度段调节。