公开(公告)号：US06975298B2

公开(公告)日：2005-12-13

申请号：US10816048

申请日：2004-04-01

申请人： Jun Koyama ,  Buyeol Lee ,  Yasuhiro Hirayama ,  Yasushi Kubota

发明人： Jun Koyama ,  Buyeol Lee ,  Yasuhiro Hirayama ,  Yasushi Kubota

IPC分类号： G02F1/1368 ,  G09G3/20 ,  G09G3/36

CPC分类号： G09G3/3607 ,  G09G3/2074 ,  G09G3/3614 ,  G09G3/3648 ,  G09G3/3659 ,  G09G3/3688 ,  G09G2300/0814 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2300/0857 ,  G09G2320/02

摘要： An AC driven active matrix display device in which image display with enough brightness can be easily achieved while reducing an amplitude range of a pixel electrode potential. The display device 1, 100 or 110 according to the invention comprises two memory circuits (a first memory circuit 40 and a second memory circuit 41) which are connected in series between each pixel electrode 22 and a corresponding signal line 30. Data is written to the first memory circuit in a first period, then the data is transferred from the first memory circuit to the corresponding second memory circuit in a second period. The potential of a counter electrode 23 is switched in the second period between a first potential (VcomH) and a second potential (VcomL).

摘要翻译： AC驱动的有源矩阵显示装置，其中可以容易地实现具有足够亮度的图像显示，同时减小像素电极电位的幅度范围。 根据本发明的显示装置1,100或110包括串联连接在每个像素电极22和对应的信号线30之间的两个存储电路（第一存储电路40和第二存储器电路41）。 数据在第一周期内写入第一存储器电路，然后数据在第二周期从第一存储器电路传送到对应的第二存储器电路。 在第一电位（VcomH）和第二电位（VcomL）之间的第二时间段中切换对电极23的电位。

公开(公告)号：US07193593B2

公开(公告)日：2007-03-20

申请号：US10651231

申请日：2003-08-29

申请人： Jun Koyama ,  Hajime Kimura ,  Yutaka Shionoiri ,  Yasuhiro Hirayama ,  Buyeol Lee

发明人： Jun Koyama ,  Hajime Kimura ,  Yutaka Shionoiri ,  Yasuhiro Hirayama ,  Buyeol Lee

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/2011 ,  G09G3/3677 ,  G09G2310/027 ,  G09G2310/0283 ,  G09G2310/0297 ,  G09G2320/0233

摘要： A liquid crystal display device having analog buffer circuits is provided which is reduced in luminance fluctuation. A source signal line driving circuit has a plurality of analog buffer circuits. Source signal lines connected to the analog buffer circuits are switched their connections to different analog buffer circuits each time a new period is started. Output fluctuation among the analog buffer circuits is thus averaged and a uniform image can be displayed on the screen.

摘要翻译： 提供具有模拟缓冲电路的液晶显示装置，其亮度波动减小。 源极信号线驱动电路具有多个模拟缓冲电路。 连接到模拟缓冲电路的源极信号线在每次开始新的周期时将其连接切换到不同的模拟缓冲电路。 因此，模拟缓冲电路之间的输出波动被平均化并且可以在屏幕上显示均匀的图像。

公开(公告)号：US07268756B2

公开(公告)日：2007-09-11

申请号：US10650930

申请日：2003-08-29

申请人： Jun Koyama ,  Yutaka Shionoiri ,  Hiroyuki Miyake ,  Yasuhiro Hirayama ,  Buyeol Lee

发明人： Jun Koyama ,  Yutaka Shionoiri ,  Hiroyuki Miyake ,  Yasuhiro Hirayama ,  Buyeol Lee

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0297 ,  G09G2320/0233

摘要： A liquid crystal display device having analog buffer circuits, which is reduced in luminance fluctuation is provided. A source signal line driver circuit has a plurality of analog buffer circuits, the plurality of source signal lines and the plurality of analog buffer circuits constitute a circuit group, and source signal lines connected to the analog buffer circuits are switched their connections to different analog buffer circuits each time a new period is started. Therefore, output fluctuation among the analog buffer circuits is averaged and a uniform image can be displayed on the screen.

摘要翻译： 提供一种具有减少亮度波动的模拟缓冲电路的液晶显示装置。 源信号线驱动电路具有多个模拟缓冲电路，多个源极信号线和多个模拟缓冲电路构成电路组，连接到模拟缓冲电路的源极信号线将其连接切换到不同的模拟缓冲器 每次启动一个新的时期的电路。 因此，模拟缓冲电路之间的输出波动被平均化并且可以在屏幕上显示均匀的图像。

公开(公告)号：US07079121B2

公开(公告)日：2006-07-18

申请号：US09928988

申请日：2001-08-15

申请人： Jun Koyama ,  Yukio Tanaka ,  Yasushi Kubota ,  Tamotsu Sakai

发明人： Jun Koyama ,  Yukio Tanaka ,  Yasushi Kubota ,  Tamotsu Sakai

IPC分类号： G09G3/36

CPC分类号： H01L27/124 ,  G02F1/1362 ,  G02F2001/13629 ,  G09G3/3685 ,  G09G2300/0426 ,  G09G2320/0209 ,  G09G2320/0223

摘要： A driving circuit of a liquid crystal display device including a first insulating substrate on which a plurality of signal lines and a plurality of scan lines are disposed, and pixel transistors made of thin film transistors are disposed in matrix at intersection points of those lines; a second insulating substrate opposite to the first insulating substrate; and a liquid crystal held between the first and second insulating substrates, in which the driving circuit is disposed on the first insulating substrate; each of clock lines or base portions of the clock lines for supplying clock signals to the driving circuit is made of a two-layer structure of the same wiring material as a gate electrode of the thin film transistor and the same wiring material as a source electrode or drain electrode of the thin film transistor; and a wiring line crossing the clock lines or the base portions of the clock lines is made of a wiring line in the same layer as a black matrix covering the pixel transistors.

公开(公告)号：US06693616B2

公开(公告)日：2004-02-17

申请号：US09782260

申请日：2001-02-14

申请人： Jun Koyama ,  Munehiro Azami ,  Yasushi Kubota ,  Hajime Washio

发明人： Jun Koyama ,  Munehiro Azami ,  Yasushi Kubota ,  Hajime Washio

IPC分类号： G09G336

CPC分类号： G09G3/3688 ,  G09G2310/0259 ,  G09G2310/027 ,  G09G2310/0297

摘要： The surface area occupied by a digital type signal line driver circuit in an image display device is large, and this is an impediment to reducing the size of the display device. A memory circuit within a signal line driver circuit is made common among n signal lines (where n is a natural number greater than or equal to 2). One horizontal scan period is divided into n divisions, and all signal lines can be driven by performing processing with respect to signal lines differing by memory circuit and D/A converter circuit, respectively, during the period of each division. It thus becomes possible to make 1/n as many memory circuits and D/A conversion circuits within the signal line driver circuit as in a conventional example.

摘要翻译： 图像显示装置中的数字式信号线驱动电路所占据的表面积较大，这是减小显示装置尺寸的障碍。 信号线驱动电路内的存储电路在n条信号线（其中n为大于或等于2的自然数）之间是共同的。 一个水平扫描周期被划分为n个分区，并且在每个划分期间分别通过对与存储电路和D / A转换器电路不同的信号线执行处理来驱动所有的信号线。 因此，与现有例一样，能够使信号线驱动电路内的1 / n的存储电路和D / A转换电路成为可能。

公开(公告)号：US06448954B1

公开(公告)日：2002-09-10

申请号：US09420893

申请日：1999-10-19

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

IPC分类号： G09G336

CPC分类号： G09G3/3677 ,  G09G2310/0283

摘要： An active matrix display device has a number of pixels arranged in matrix form, signal lines for supplying display signals to the pixels, and a driver circuit for driving the signal lines. The driver circuit includes a frequency divider circuit for frequency-dividing input multi-phase clock signals, a synchronous counter circuit for frequency-dividing part of the input multi-phase clock signals, and a decoder circuit for selecting a desired one of the signal lines based on outputs of the frequency divider circuit and the synchronous counter circuit.

摘要翻译： 有源矩阵显示装置具有以矩阵形式布置的多个像素，用于向像素提供显示信号的信号线以及用于驱动信号线的驱动电路。 驱动器电路包括用于对输入多相时钟信号进行分频的分频器电路，用于对输入多相时钟信号的一部分进行分频的同步计数器电路和用于选择所需信号线的解码器电路 基于分频器电路和同步计数器电路的输出。

公开(公告)号：US06281865B1

公开(公告)日：2001-08-28

申请号：US09150933

申请日：1998-09-10

申请人： Jun Koyama ,  Yukio Tanaka ,  Yasushi Kubota ,  Tamotsu Sakai

发明人： Jun Koyama ,  Yukio Tanaka ,  Yasushi Kubota ,  Tamotsu Sakai

IPC分类号： G09G336

CPC分类号： H01L27/124 ,  G02F1/1362 ,  G02F2001/13629 ,  G09G3/3685 ,  G09G2300/0426 ,  G09G2320/0209 ,  G09G2320/0223

摘要： A driving circuit of a liquid crystal display device including a first insulating substrate on which a plurality of signal lines and a plurality of scan lines are disposed, and pixel transistors made of thin film transistors are disposed in matrix at intersection points of those lines; a second insulating substrate opposite to the first insulating substrate; and a liquid crystal held between the first and second insulating substrates, in which the driving circuit is disposed on the first insulating substrate; each of clock lines or base portions of the clock lines for supplying clock signals to the driving circuit is made of a two-layer structure of the same wiring material as a gate electrode of the thin film transistor and the same wiring material as a source electrode or drain electrode of the thin film transistor; and a wiring line crossing the clock lines or the base portions of the clock lines is made of a wiring line in the same layer as a black matrix covering the pixel transistors.

摘要翻译： 一种液晶显示装置的驱动电路，包括：第一绝缘基板，多个信号线和多个扫描线被配置在其上;以及由薄膜晶体管制成的像素晶体管，以这些线的交点为矩阵; 与所述第一绝缘基板相对的第二绝缘基板; 以及保持在第一和第二绝缘基板之间的液晶，其中驱动电路设置在第一绝缘基板上; 用于向驱动电路提供时钟信号的时钟线的每个时钟线或基极部分由与薄膜晶体管的栅电极相同的布线材料和与源电极相同的布线材料的两层结构 或漏极电极; 并且与时钟线的时钟线或基极部分交叉的布线由与覆盖像素晶体管的黑矩阵相同的层中的布线构成。

公开(公告)号：US06465806B2

公开(公告)日：2002-10-15

申请号：US09095587

申请日：1998-06-11

申请人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai ,  Zhang Hongyong ,  Jun Koyama

发明人： Yasushi Kubota ,  Ichiro Shiraki ,  Tamotsu Sakai ,  Zhang Hongyong ,  Jun Koyama

IPC分类号： H01L2904

CPC分类号： H01L23/5226 ,  G02F1/1345 ,  G02F1/13454 ,  G09G3/3688 ,  H01L21/76838 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes a first conductive layer; an interlayer insulative layer having an opening; and a second conductive layer. The first conductive layer, the interlayer insulative layer and the second conductive layer are sequentially laminated. The opening is partially covered by the second conductive layer, and an area of the first conductive layer is substantially entirely covered by the second conductive layer in the opening.

摘要翻译： 半导体器件包括第一导电层; 具有开口的层间绝缘层; 和第二导电层。 第一导电层，层间绝缘层和第二导电层依次层叠。 开口部分被第二导电层覆盖，并且第一导电层的面积基本上完全被开口中的第二导电层覆盖。

公开(公告)号：US6011535A

公开(公告)日：2000-01-04

申请号：US744054

申请日：1996-11-05

申请人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

发明人： Kenichi Katoh ,  Yasushi Kubota ,  Hidehiko Chimura ,  Jun Koyama

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0283

摘要： A scanning circuit for a display device having an array of pixels. One embodiment of the scanning circuit includes L scan control signal lines, first logic circuits to operate on signals from M of the L scan control signal lines, flip-flop circuits communicating with the first logic circuits, N timing control signal lines, and second logic circuits coupled to operate on signal from the N timing control signal lines and the flip-flop circuits.

摘要翻译： 一种具有像素阵列的显示装置的扫描电路。 扫描电路的一个实施例包括L扫描控制信号线，对来自L扫描控制信号线的M的信号进行操作的第一逻辑电路，与第一逻辑电路通信的触发电路，N个定时控制信号线和第二逻辑 耦合到来自N个定时控制信号线和触发器电路的信号的电路。

公开(公告)号：US5990857A

公开(公告)日：1999-11-23

申请号：US841585

申请日：1997-04-30

申请人： Yasushi Kubota ,  Kenichi Katoh ,  Jun Koyama ,  Hidehiko Chimura ,  Yukio Tanaka

发明人： Yasushi Kubota ,  Kenichi Katoh ,  Jun Koyama ,  Hidehiko Chimura ,  Yukio Tanaka

IPC分类号： G09G3/20 ,  G09G3/36 ,  G11C19/00

CPC分类号： G09G3/3685 ,  G09G3/3648 ,  G09G3/3666 ,  G09G2310/0286 ,  G09G2330/021

摘要： The shift register of this invention for sequentially transferring a digital signal in synchronization with a clock signal includes: a plurality of circuit blocks connected in series, each including a prescribed number of sequential latch circuits, each latch circuit outputting a signal corresponding to an input signal based on the clock signal; and a plurality of clock signal control circuits provided for the respective circuit blocks for controlling the supply of the clock signal to the latch circuits in the corresponding circuit blocks, wherein the control of the supply of the clock signal by each clock signal control circuit to the latch circuits in the corresponding circuit block is conducted in response to output signals from prescribed latch circuits in the circuit blocks preceding and subsequent to the corresponding circuit block.

摘要翻译： 本发明的用于与时钟信号同步地顺序传送数字信号的移位寄存器包括：串联连接的多个电路块，每个电路块包括规定数量的顺序锁存电路，每个锁存电路输出对应于输入信号的信号 基于时钟信号; 以及多个时钟信号控制电路，用于各个电路块，用于控制向对应的电路块中的锁存电路提供时钟信号，其中控制由每个时钟信号控制电路将时钟信号提供给 响应于相应电路块之前和之后的电路块中来自规定的锁存电路的输出信号，进行相应电路块中的锁存电路。